Return a Result from the TargetIsa::encode() method.
When an instruction can't be encoded, provide a viable legalization action in the form of a Legalize enum.
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@@ -6,7 +6,7 @@ mod enc_tables;
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use super::super::settings as shared_settings;
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use isa::enc_tables::{self as shared_enc_tables, lookup_enclist, general_encoding};
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use isa::Builder as IsaBuilder;
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use isa::{TargetIsa, Encoding};
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use isa::{TargetIsa, Encoding, Legalize};
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use ir::{InstructionData, DataFlowGraph};
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#[allow(dead_code)]
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@@ -48,7 +48,7 @@ impl TargetIsa for Isa {
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&self.shared_flags
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}
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fn encode(&self, _: &DataFlowGraph, inst: &InstructionData) -> Option<Encoding> {
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fn encode(&self, _: &DataFlowGraph, inst: &InstructionData) -> Result<Encoding, Legalize> {
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lookup_enclist(inst.first_type(),
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inst.opcode(),
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self.cpumode,
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@@ -58,6 +58,7 @@ impl TargetIsa for Isa {
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&enc_tables::ENCLISTS[..],
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|instp| enc_tables::check_instp(inst, instp),
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|isap| self.isa_flags.numbered_predicate(isap as usize))
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.ok_or(Legalize::Expand)
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})
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}
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@@ -109,7 +110,7 @@ mod tests {
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};
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// Immediate is out of range for ADDI.
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assert_eq!(isa.encode(&dfg, &inst64_large), None);
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assert_eq!(isa.encode(&dfg, &inst64_large), Err(isa::Legalize::Expand));
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// Create an iadd_imm.i32 which is encodable in RV64.
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let inst32 = InstructionData::BinaryImm {
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@@ -144,8 +145,8 @@ mod tests {
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imm: immediates::Imm64::new(-10),
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};
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// ADDI is I/0b00100
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assert_eq!(isa.encode(&dfg, &inst64), None);
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// In 32-bit mode, an i64 bit add should be narrowed.
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assert_eq!(isa.encode(&dfg, &inst64), Err(isa::Legalize::Narrow));
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// Try to encode iadd_imm.i64 vx1, -10000.
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let inst64_large = InstructionData::BinaryImm {
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@@ -155,8 +156,8 @@ mod tests {
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imm: immediates::Imm64::new(-10000),
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};
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// Immediate is out of range for ADDI.
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assert_eq!(isa.encode(&dfg, &inst64_large), None);
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// In 32-bit mode, an i64 bit add should be narrowed.
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assert_eq!(isa.encode(&dfg, &inst64_large), Err(isa::Legalize::Narrow));
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// Create an iadd_imm.i32 which is encodable in RV32.
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let inst32 = InstructionData::BinaryImm {
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@@ -176,7 +177,7 @@ mod tests {
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args: [arg32, arg32],
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};
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assert_eq!(isa.encode(&dfg, &mul32), None);
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assert_eq!(isa.encode(&dfg, &mul32), Err(isa::Legalize::Expand));
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}
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#[test]
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