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Add x86 SIMD bxor

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This commit is contained in:
Andrew Brown
2019-09-30 11:48:20 -07:00
parent 4cdc1e76a4
commit dbe7dd59da
2 changed files with 13 additions and 3 deletions
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10
cranelift/codegen/meta/src/isa/x86/encodings.rs
View File

@@ -1975,13 +1975,17 @@ pub(crate) fn define<'defs>(
// SIMD logical operations // SIMD logical operations
for ty in ValueType::all_lane_types().filter(allowed_simd_type) { for ty in ValueType::all_lane_types().filter(allowed_simd_type) {
// band // and
let band = band.bind(vector(ty, sse_vector_size)); let band = band.bind(vector(ty, sse_vector_size));
e.enc_32_64(band, rec_fa.opcodes(&PAND)); e.enc_32_64(band, rec_fa.opcodes(&PAND));
// bor // or
let bor = bor.bind(vector(ty, sse_vector_size)); let bor = bor.bind(vector(ty, sse_vector_size));
e.enc_32_64(bor, rec_fa.nonrex().opcodes(&POR)); e.enc_32_64(bor, rec_fa.opcodes(&POR));
// xor
let bxor = bxor.bind(vector(ty, sse_vector_size));
e.enc_32_64(bxor, rec_fa.opcodes(&PXOR));
} }
// SIMD icmp using PCMPEQ* // SIMD icmp using PCMPEQ*

6
cranelift/filetests/filetests/isa/x86/simd-logical-binemit.clif
View File

@@ -13,3 +13,9 @@ ebb0(v0: b64x2 [%xmm6], v1: b64x2 [%xmm3]):
[-, %xmm6] v2 = band v0, v1 ; bin: 66 0f db f3 [-, %xmm6] v2 = band v0, v1 ; bin: 66 0f db f3
return v2 return v2
} }
function %bxor_b32x4(b32x4, b32x4) -> b32x4 {
ebb0(v0: b32x4 [%xmm4], v1: b32x4 [%xmm0]):
[-, %xmm4] v2 = bxor v0, v1 ; bin: 66 0f ef e0
return v2
}