Generate binemit::emit_inst() functions.
Use the meta language encoding recipes to generate an emit_inst() function for each ISA. The generated calls into recipe_*() functions that must be implemented by hand. Implement recipe_*() functions for the RISC-V recipes. Add the TargetIsa::emit_inst() entry point which emits an instruction to a CodeSink trait object.
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52
lib/cretonne/src/isa/riscv/binemit.rs
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52
lib/cretonne/src/isa/riscv/binemit.rs
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//! Emitting binary RISC-V machine code.
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use binemit::{CodeSink, bad_encoding};
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use ir::{Function, Inst, InstructionData};
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include!(concat!(env!("OUT_DIR"), "/binemit-riscv.rs"));
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/// R-type instructions.
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///
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/// 31 24 19 14 11 6
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/// funct7 rs2 rs1 funct3 rd opcode
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/// 25 20 15 12 7 0
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///
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/// Encoding bits: `opcode[6:2] | (funct3 << 5) | (funct7 << 8)`.
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fn recipe_r<CS: CodeSink + ?Sized>(func: &Function, inst: Inst, sink: &mut CS) {
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if let InstructionData::Binary { args, .. } = func.dfg[inst] {
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let bits = func.encodings[inst].bits();
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let rs1 = func.locations[args[0]].unwrap_reg();
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let rs2 = func.locations[args[1]].unwrap_reg();
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let rd = func.locations[func.dfg.first_result(inst)].unwrap_reg();
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// 0-6: opcode
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let mut i = 0x3;
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i |= (bits as u32 & 0x1f) << 2;
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// 7-11: rd
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i |= (rd as u32 & 0x1f) << 7;
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// 12-14: funct3
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i |= ((bits as u32 >> 5) & 0x7) << 12;
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// 15-19: rs1
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i |= (rs1 as u32 & 0x1f) << 15;
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// 20-24: rs1
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i |= (rs2 as u32 & 0x1f) << 20;
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// 25-31: funct7
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i |= ((bits as u32 >> 8) & 0x7f) << 25;
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sink.put4(i);
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} else {
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panic!("Expected Binary format: {:?}", func.dfg[inst]);
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}
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}
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fn recipe_rshamt<CS: CodeSink + ?Sized>(_func: &Function, _inst: Inst, _sink: &mut CS) {
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unimplemented!()
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}
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fn recipe_i<CS: CodeSink + ?Sized>(_func: &Function, _inst: Inst, _sink: &mut CS) {
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unimplemented!()
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}
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fn recipe_iret<CS: CodeSink + ?Sized>(_func: &Function, _inst: Inst, _sink: &mut CS) {
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unimplemented!()
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}
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