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Refactor calling convention settings. (#304)

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Add a calling-convention setting to the `Flags` used as part of the
`TargetIsa`. This allows Cretonne code that generates calls to use the
correct convention, such as when emitting libcalls during legalization
or when the wasm frontend is decoding functions. This setting can be
overridden per-function.

This also adds "fast", "cold", and "fastcall" conventions, with "fast"
as the new default. Note that "fast" and "cold" are not intended to be
ABI-compatible across Cretonne versions.

This will also ensure Windows users will get an `unimplemented!` rather
than silent calling-convention mismatches, which reflects the fact that
Windows calling conventions are not yet implemented.

This also renames SpiderWASM, which isn't camel-case, to Baldrdash,
which is, and which is also a more relevant name.
This commit is contained in:
Dan Gohman
2018-04-22 21:35:18 -07:00
committed by GitHub
parent 8a9e4b9cff
commit c5b15c2396
38 changed files with 226 additions and 161 deletions
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2
cranelift/filetests/regalloc/aliases.cton
View File

@@ -2,7 +2,7 @@ test regalloc
set is_64bit
isa x86 haswell
function %value_aliases(i32, f32, i64 vmctx) spiderwasm {
function %value_aliases(i32, f32, i64 vmctx) baldrdash {
gv0 = vmctx
heap0 = static gv0, min 0x0001_0000, bound 0x0001_0000_0000, guard 0x8000_0000

6
cranelift/filetests/regalloc/iterate.cton
View File

@@ -2,7 +2,7 @@ test regalloc
set is_64bit
isa x86 haswell
function u0:9(i64 [%rdi], f32 [%xmm0], f64 [%xmm1], i32 [%rsi], i32 [%rdx], i64 vmctx [%r14]) -> i64 [%rax] spiderwasm {
function u0:9(i64 [%rdi], f32 [%xmm0], f64 [%xmm1], i32 [%rsi], i32 [%rdx], i64 vmctx [%r14]) -> i64 [%rax] baldrdash {
ebb0(v0: i64, v1: f32, v2: f64, v3: i32, v4: i32, v5: i64):
v32 = iconst.i32 0
v6 = bitcast.f32 v32
@@ -104,9 +104,9 @@ ebb1(v31: i64):
return v31
}
function u0:26(i64 vmctx [%r14]) -> i64 [%rax] spiderwasm {
function u0:26(i64 vmctx [%r14]) -> i64 [%rax] baldrdash {
gv0 = vmctx+48
sig0 = (i32 [%rdi], i64 [%rsi], i64 vmctx [%r14], i64 sigid [%rbx]) -> i64 [%rax] spiderwasm
sig0 = (i32 [%rdi], i64 [%rsi], i64 vmctx [%r14], i64 sigid [%rbx]) -> i64 [%rax] baldrdash
ebb0(v0: i64):
v1 = iconst.i32 32

2
cranelift/filetests/regalloc/unreachable_code.cton
View File

@@ -6,7 +6,7 @@ isa x86 haswell
; This function contains unreachable blocks which trip up the register
; allocator if they don't get cleared out.
function %unreachable_blocks(i64 vmctx) -> i32 spiderwasm {
function %unreachable_blocks(i64 vmctx) -> i32 baldrdash {
ebb0(v0: i64):
v1 = iconst.i32 0
v2 = iconst.i32 0