Add a CPUMode meta-language class.

2016-08-03 11:20:13 -07:00
parent bd72439fbc
commit c4faef196e
3 changed files with 24 additions and 1 deletions
--- a/meta/target/riscv/init.py
+++ b/meta/target/riscv/init.py
@@ -25,7 +25,11 @@ RV32G / RV64G

 """

-from cretonne import Target
+from cretonne import Target, CPUMode
 import cretonne.base

 target = Target('riscv', [cretonne.base.instructions])
+
+# CPU modes for 32-bit and 64-bit operation.
+RV32 = CPUMode('RV32', target)
+RV64 = CPUMode('RV64', target)