Add an empty isa/riscv module scaffold.

Targeted ISAs will be defined as sub-modules of isa.

src/libcretonne/isa/mod.rs

@@ -0,0 +1,6 @@
+//! Instruction Set Architectures.
+//!
+//! The sub-modules of this `isa` module provide definitions for the instruction sets that Cretonne
+//! can target.
+
+pub mod riscv;