Add an empty isa/riscv module scaffold.

Targeted ISAs will be defined as sub-modules of isa.

src/libcretonne/isa/mod.rs

@@ -0,0 +1,6 @@
+//! Instruction Set Architectures.
+//!
+//! The sub-modules of this `isa` module provide definitions for the instruction sets that Cretonne
+//! can target.
+
+pub mod riscv;

src/libcretonne/isa/riscv/mod.rs

@@ -0,0 +1 @@
+//! RISC-V Instruction Set Architecture.

src/libcretonne/lib.rs

@@ -8,6 +8,7 @@
 pub const VERSION: &'static str = env!("CARGO_PKG_VERSION");
 
 pub mod ir;
+pub mod isa;
 pub mod write;
 pub mod cfg;
 pub mod dominator_tree;