Remove heaps from core Cranelift, push them into cranelift-wasm (#5386)
* cranelift-wasm: translate Wasm loads into lower-level CLIF operations
Rather than using `heap_{load,store,addr}`.
* cranelift: Remove the `heap_{addr,load,store}` instructions
These are now legalized in the `cranelift-wasm` frontend.
* cranelift: Remove the `ir::Heap` entity from CLIF
* Port basic memory operation tests to .wat filetests
* Remove test for verifying CLIF heaps
* Remove `heap_addr` from replace_branching_instructions_and_cfg_predecessors.clif test
* Remove `heap_addr` from readonly.clif test
* Remove `heap_addr` from `table_addr.clif` test
* Remove `heap_addr` from the simd-fvpromote_low.clif test
* Remove `heap_addr` from simd-fvdemote.clif test
* Remove `heap_addr` from the load-op-store.clif test
* Remove the CLIF heap runtest
* Remove `heap_addr` from the global_value.clif test
* Remove `heap_addr` from fpromote.clif runtests
* Remove `heap_addr` from fdemote.clif runtests
* Remove `heap_addr` from memory.clif parser test
* Remove `heap_addr` from reject_load_readonly.clif test
* Remove `heap_addr` from reject_load_notrap.clif test
* Remove `heap_addr` from load_readonly_notrap.clif test
* Remove `static-heap-without-guard-pages.clif` test
Will be subsumed when we port `make-heap-load-store-tests.sh` to generating
`.wat` tests.
* Remove `static-heap-with-guard-pages.clif` test
Will be subsumed when we port `make-heap-load-store-tests.sh` over to `.wat`
tests.
* Remove more heap tests
These will be subsumed by porting `make-heap-load-store-tests.sh` over to `.wat`
tests.
* Remove `heap_addr` from `simple-alias.clif` test
* Remove `heap_addr` from partial-redundancy.clif test
* Remove `heap_addr` from multiple-blocks.clif test
* Remove `heap_addr` from fence.clif test
* Remove `heap_addr` from extends.clif test
* Remove runtests that rely on heaps
Heaps are not a thing in CLIF or the interpreter anymore
* Add generated load/store `.wat` tests
* Enable memory-related wasm features in `.wat` tests
* Remove CLIF heap from fcmp-mem-bug.clif test
* Add a mode for compiling `.wat` all the way to assembly in filetests
* Also generate WAT to assembly tests in `make-load-store-tests.sh`
* cargo fmt
* Reinstate `f{de,pro}mote.clif` tests without the heap bits
* Remove undefined doc link
* Remove outdated SVG and dot file from docs
* Add docs about `None` returns for base address computation helpers
* Factor out `env.heap_access_spectre_mitigation()` to a local
* Expand docs for `FuncEnvironment::heaps` trait method
* Restore f{de,pro}mote+load clif runtests with stack memory
This commit is contained in:
@@ -8,10 +8,9 @@ target aarch64
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function %f0(i64 vmctx, i32) -> i32, i32, i32, i64, i64, i64 {
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gv0 = vmctx
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gv1 = load.i64 notrap readonly aligned gv0+8
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heap0 = static gv1, bound 0x1_0000_0000, offset_guard 0x8000_0000, index_type i32
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block0(v0: i64, v1: i32):
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v2 = heap_addr.i64 heap0, v1, 12, 0
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v2 = global_value.i64 gv1
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;; Initial load. This will not be reused by anything below, even
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;; though it does access the same address.
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@@ -8,10 +8,9 @@ target aarch64
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function %f0(i64 vmctx, i32) -> i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 {
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gv0 = vmctx
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gv1 = load.i64 notrap readonly aligned gv0+8
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heap0 = static gv1, bound 0x1_0000_0000, offset_guard 0x8000_0000, index_type i32
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block0(v0: i64, v1: i32):
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v2 = heap_addr.i64 heap0, v1, 12, 0
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v2 = global_value.i64 gv1
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v3 = load.i32 v2+8
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v4 = load.i32 vmctx v0+16
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@@ -7,11 +7,9 @@ target aarch64
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function %f0(i64 vmctx, i32) -> i32 {
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gv0 = vmctx
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gv1 = load.i64 notrap readonly aligned gv0+8
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heap0 = static gv1, bound 0x1_0000_0000, offset_guard 0x8000_0000, index_type i32
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block0(v0: i64, v1: i32):
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v2 = heap_addr.i64 heap0, v1, 12, 0
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v2 = global_value.i64 gv1
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v3 = load.i32 v2+8
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brz v2, block1
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jump block2
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@@ -8,7 +8,6 @@ target aarch64
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function %f0(i64 vmctx, i32) -> i32, i32 {
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gv0 = vmctx
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gv1 = load.i64 notrap readonly aligned gv0+8
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heap0 = static gv1, bound 0x1_0000_0000, offset_guard 0x8000_0000, index_type i32
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fn0 = %g(i64 vmctx)
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block0(v0: i64, v1: i32):
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@@ -16,17 +15,17 @@ block0(v0: i64, v1: i32):
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jump block2
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block1:
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v2 = heap_addr.i64 heap0, v1, 68, 0
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v2 = global_value.i64 gv1
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v3 = load.i32 v2+64
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jump block3(v3)
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block2:
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v4 = heap_addr.i64 heap0, v1, 132, 0
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v4 = global_value.i64 gv1
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v5 = load.i32 v4+128
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jump block3(v5)
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block3(v6: i32):
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v7 = heap_addr.i64 heap0, v1, 68, 0
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v7 = global_value.i64 gv1
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v8 = load.i32 v7+64
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;; load should survive:
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; check: v8 = load.i32 v7+64
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@@ -9,14 +9,13 @@ target aarch64
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function %f0(i64 vmctx, i32) -> i32, i32, i32, i32 {
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gv0 = vmctx
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gv1 = load.i64 notrap readonly aligned gv0+8
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heap0 = static gv1, bound 0x1_0000_0000, offset_guard 0x8000_0000, index_type i32
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fn0 = %g(i64 vmctx)
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block0(v0: i64, v1: i32):
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v2 = heap_addr.i64 heap0, v1, 12, 0
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v2 = global_value.i64 gv1
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v3 = load.i32 v2+8
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;; This should reuse the load above.
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v4 = heap_addr.i64 heap0, v1, 12, 0
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v4 = global_value.i64 gv1
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v5 = load.i32 v4+8
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; check: v5 -> v3
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@@ -38,15 +37,14 @@ block0(v0: i64, v1: i32):
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function %f1(i64 vmctx, i32) -> i32 {
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gv0 = vmctx
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gv1 = load.i64 notrap readonly aligned gv0+8
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heap0 = static gv1, bound 0x1_0000_0000, offset_guard 0x8000_0000, index_type i32
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fn0 = %g(i64 vmctx)
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block0(v0: i64, v1: i32):
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v2 = heap_addr.i64 heap0, v1, 12, 0
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v2 = global_value.i64 gv1
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store.i32 v1, v2+8
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;; This load should pick up the store above.
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v3 = heap_addr.i64 heap0, v1, 12, 0
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v3 = global_value.i64 gv1
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v4 = load.i32 v3+8
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; check: v4 -> v1
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