fix: dst should be Writable, not ValueRegs

2021-01-08 16:49:28 -08:00
parent 09a5b91b9d
commit b25a3c387e
1 changed files with 1 additions and 1 deletions
--- a/cranelift/codegen/src/isa/x64/lower.rs
+++ b/cranelift/codegen/src/isa/x64/lower.rs
@@ -4107,7 +4107,7 @@ fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
            //     unused load.
            let src = input_to_reg_mem(ctx, inputs[0]);
            let src_ty = ctx.input_ty(insn, 0);
-            let dst = get_output_reg(ctx, outputs[0]);
+            let dst = get_output_reg(ctx, outputs[0]).only_reg().unwrap();
            let dst_ty = ty.unwrap();
            assert!(src_ty == dst_ty.lane_type() && dst_ty.bits() == 128);
            match src {