aarch64: Add ishl,ushr,sshr for i128 values

cranelift/filetests/filetests/isa/aarch64/bitops.clif

@@ -383,4 +383,134 @@ block0(v0: i128, v1: i128):
 ; nextln: eon x0, x0, x2
 ; nextln: eon x1, x1, x3
 ; nextln: ldp fp, lr, [sp], #16
-; nextln: ret
+; nextln: ret
+
+
+function %ishl_i128_i8(i128, i8) -> i128 {
+block0(v0: i128, v1: i8):
+    v2 = ishl.i128 v0, v1
+    return v2
+}
+
+; check: stp fp, lr, [sp, #-16]!
+; nextln: mov fp, sp
+; nextln: orn w3, wzr, w2
+; nextln: lsr x4, x0, #1
+; nextln: lsl x1, x1, x2
+; nextln: lsr x3, x4, x3
+; nextln: lsl x0, x0, x2
+; nextln: ands xzr, x2, #64
+; nextln: orr x1, x1, x3
+; nextln: csel x1, x0, x1, ne
+; nextln: csel x0, xzr, x0, ne
+; nextln: ldp fp, lr, [sp], #16
+; nextln: ret
+
+
+function %ishl_i128_i128(i128, i128) -> i128 {
+block0(v0: i128, v1: i128):
+    v2 = ishl.i128 v0, v1
+    return v2
+}
+
+; check: stp fp, lr, [sp, #-16]!
+; nextln: mov fp, sp
+; nextln: orn w3, wzr, w2
+; nextln: lsr x4, x0, #1
+; nextln: lsl x1, x1, x2
+; nextln: lsr x3, x4, x3
+; nextln: lsl x0, x0, x2
+; nextln: ands xzr, x2, #64
+; nextln: orr x1, x1, x3
+; nextln: csel x1, x0, x1, ne
+; nextln: csel x0, xzr, x0, ne
+; nextln: ldp fp, lr, [sp], #16
+; nextln: ret
+
+
+function %ushr_i128_i8(i128, i8) -> i128 {
+block0(v0: i128, v1: i8):
+    v2 = ushr.i128 v0, v1
+    return v2
+}
+
+; check: stp fp, lr, [sp, #-16]!
+; nextln: mov fp, sp
+; nextln: orn w3, wzr, w2
+; nextln: lsl x4, x1, #1
+; nextln: lsr x0, x0, x2
+; nextln: lsl x3, x4, x3
+; nextln: lsr x1, x1, x2
+; nextln: ands xzr, x2, #64
+; nextln: orr x0, x0, x3
+; nextln: csel x2, xzr, x1, ne
+; nextln: csel x0, x1, x0, ne
+; nextln: mov x1, x2
+; nextln: ldp fp, lr, [sp], #16
+; nextln: ret
+
+
+function %ushr_i128_i128(i128, i128) -> i128 {
+block0(v0: i128, v1: i128):
+    v2 = ushr.i128 v0, v1
+    return v2
+}
+
+; check: stp fp, lr, [sp, #-16]!
+; nextln: mov fp, sp
+; nextln: orn w3, wzr, w2
+; nextln: lsl x4, x1, #1
+; nextln: lsr x0, x0, x2
+; nextln: lsl x3, x4, x3
+; nextln: lsr x1, x1, x2
+; nextln: ands xzr, x2, #64
+; nextln: orr x0, x0, x3
+; nextln: csel x2, xzr, x1, ne
+; nextln: csel x0, x1, x0, ne
+; nextln: mov x1, x2
+; nextln: ldp fp, lr, [sp], #16
+; nextln: ret
+
+
+function %sshr_i128_i8(i128, i8) -> i128 {
+block0(v0: i128, v1: i8):
+    v2 = sshr.i128 v0, v1
+    return v2
+}
+
+; check: stp fp, lr, [sp, #-16]!
+; nextln: mov fp, sp
+; nextln: orn w3, wzr, w2
+; nextln: lsl x4, x1, #1
+; nextln: lsr x0, x0, x2
+; nextln: lsl x4, x4, x3
+; nextln: asr x3, x1, x2
+; nextln: ands xzr, x2, #64
+; nextln: asr x1, x1, #63
+; nextln: orr x0, x0, x4
+; nextln: csel x1, x1, x3, ne
+; nextln: csel x0, x3, x0, ne
+; nextln: ldp fp, lr, [sp], #16
+; nextln: ret
+
+
+function %sshr_i128_i128(i128, i128) -> i128 {
+block0(v0: i128, v1: i128):
+    v2 = sshr.i128 v0, v1
+    return v2
+}
+
+; check: stp fp, lr, [sp, #-16]!
+; nextln: mov fp, sp
+; nextln: orn w3, wzr, w2
+; nextln: lsl x4, x1, #1
+; nextln: lsr x0, x0, x2
+; nextln: lsl x4, x4, x3
+; nextln: asr x3, x1, x2
+; nextln: ands xzr, x2, #64
+; nextln: asr x1, x1, #63
+; nextln: orr x0, x0, x4
+; nextln: csel x1, x1, x3, ne
+; nextln: csel x0, x3, x0, ne
+; nextln: ldp fp, lr, [sp], #16
+; nextln: ret

cranelift/filetests/filetests/runtests/i128-arithmetic.clif

@@ -1,5 +1,5 @@
 test run
-; target aarch64 TODO: Not yet implemented on aarch64
+target aarch64
 ; target s390x TODO: Not yet implemented on s390x
 target x86_64 machinst