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The addend for a PCRel4 reloc should be -4 too.

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This commit is contained in:
Dan Gohman
2018-04-09 06:15:33 -07:00
parent 781d3ee3ff
commit b0d414731c
3 changed files with 5 additions and 3 deletions
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2
cranelift/filetests/isa/intel/binary32.cton
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@@ -352,7 +352,7 @@ ebb0:
[-,%rsi] v351 = bint.i32 v301 ; bin: 0f b6 f2
; asm: call foo
call fn0() ; bin: e8 PCRel4(%foo) 00000000
call fn0() ; bin: e8 PCRel4(%foo-4) 00000000
; asm: movl $0, %ecx
[-,%rcx] v400 = func_addr.i32 fn0 ; bin: b9 Abs4(%foo) 00000000

2
cranelift/filetests/isa/intel/binary64.cton
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@@ -474,7 +474,7 @@ ebb0:
[-,%rsi] v351 = bint.i64 v301 ; bin: 0f b6 f2
; asm: call foo
call fn0() ; bin: e8 PCRel4(%foo) 00000000
call fn0() ; bin: e8 PCRel4(%foo-4) 00000000
; asm: movabsq $0, %rcx
[-,%rcx] v400 = func_addr.i64 fn0 ; bin: 48 b9 Abs8(%foo) 0000000000000000

4
lib/cretonne/meta/isa/intel/recipes.py
View File

@@ -1007,9 +1007,11 @@ call_id = TailRecipe(
'call_id', Call, size=4, ins=(), outs=(),
emit='''
PUT_OP(bits, BASE_REX, sink);
// The addend adjusts for the difference between the end of the
// instruction and the beginning of the immediate field.
sink.reloc_external(Reloc::IntelPCRel4,
&func.dfg.ext_funcs[func_ref].name,
0);
-4);
sink.put4(0);
''')