Generate SSA code from returns (#5172)

Modify return pseudo-instructions to have pairs of registers: virtual and real. This allows us to constrain the virtual registers to the real ones specified by the abi, instead of directly emitting moves to those real registers.
2022-11-08 16:00:49 -08:00
parent d59caf39b6
commit b077854b57
171 changed files with 6368 additions and 6364 deletions
--- a/cranelift/codegen/src/isa/riscv64/inst.isle
+++ b/cranelift/codegen/src/isa/riscv64/inst.isle
@@ -71,7 +71,7 @@
    (Args
      (args VecArgPair))

-    (Ret (rets VecReg))
+    (Ret (rets VecRetPair))

     (Extend
      (rd WritableReg)