Merge pull request #3655 from bjorn3/machinst_cleanups2

Remove MachBackend

cranelift/codegen/src/isa/x64/inst/mod.rs

@@ -7,7 +7,7 @@ use crate::isa::x64::abi::X64ABIMachineSpec;
 use crate::isa::x64::settings as x64_settings;
 use crate::isa::CallConv;
 use crate::machinst::*;
-use crate::{settings, settings::Flags, CodegenError, CodegenResult};
+use crate::{settings, CodegenError, CodegenResult};
 use alloc::boxed::Box;
 use alloc::vec::Vec;
 use regalloc::{
@@ -26,7 +26,7 @@ pub mod regs;
 pub mod unwind;
 
 use args::*;
-use regs::{create_reg_universe_systemv, show_ireg_sized};
+use regs::show_ireg_sized;
 
 //=============================================================================
 // Instructions (top level): definition
@@ -3226,10 +3226,6 @@ impl MachInst for Inst {
         ret
     }
 
-    fn reg_universe(flags: &Flags) -> RealRegUniverse {
-        create_reg_universe_systemv(flags)
-    }
-
     fn worst_case_size() -> CodeOffset {
         15
     }

cranelift/codegen/src/isa/x64/mod.rs

@@ -9,12 +9,12 @@ use crate::isa::unwind::systemv;
 use crate::isa::x64::{inst::regs::create_reg_universe_systemv, settings as x64_settings};
 use crate::isa::Builder as IsaBuilder;
 use crate::machinst::{
-    compile, MachBackend, MachCompileResult, MachTextSectionBuilder, TargetIsaAdapter,
-    TextSectionBuilder, VCode,
+    compile, MachCompileResult, MachTextSectionBuilder, TextSectionBuilder, VCode,
 };
 use crate::result::CodegenResult;
 use crate::settings::{self as shared_settings, Flags};
 use alloc::{boxed::Box, vec::Vec};
+use core::fmt;
 
 use regalloc::{PrettyPrint, RealRegUniverse, Reg};
 use target_lexicon::Triple;
@@ -50,11 +50,11 @@ impl X64Backend {
         // block layout and finalizes branches. The result is ready for binary emission.
         let emit_info = EmitInfo::new(flags.clone(), self.x64_flags.clone());
         let abi = Box::new(abi::X64ABICallee::new(&func, flags)?);
-        compile::compile::<Self>(&func, self, abi, emit_info)
+        compile::compile::<Self>(&func, self, abi, &self.reg_universe, emit_info)
     }
 }
 
-impl MachBackend for X64Backend {
+impl TargetIsa for X64Backend {
     fn compile_function(
         &self,
         func: &Function,
@@ -102,10 +102,6 @@ impl MachBackend for X64Backend {
         &self.triple
     }
 
-    fn reg_universe(&self) -> &RealRegUniverse {
-        &self.reg_universe
-    }
-
     fn unsigned_add_overflow_condition(&self) -> IntCC {
         // Unsigned `<`; this corresponds to the carry flag set on x86, which
         // indicates an add has overflowed.
@@ -146,7 +142,7 @@ impl MachBackend for X64Backend {
     }
 
     #[cfg(feature = "unwind")]
-    fn map_reg_to_dwarf(&self, reg: Reg) -> Result<u16, systemv::RegisterMappingError> {
+    fn map_regalloc_reg_to_dwarf(&self, reg: Reg) -> Result<u16, systemv::RegisterMappingError> {
         inst::unwind::systemv::map_reg(reg).map(|reg| reg.0)
     }
 
@@ -155,6 +151,16 @@ impl MachBackend for X64Backend {
     }
 }
 
+impl fmt::Display for X64Backend {
+    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
+        f.debug_struct("MachBackend")
+            .field("name", &self.name())
+            .field("triple", &self.triple())
+            .field("flags", &format!("{}", self.flags()))
+            .finish()
+    }
+}
+
 /// Create a new `isa::Builder`.
 pub(crate) fn isa_builder(triple: Triple) -> IsaBuilder {
     IsaBuilder {
@@ -171,5 +177,5 @@ fn isa_constructor(
 ) -> Box<dyn TargetIsa> {
     let isa_flags = x64_settings::Flags::new(&shared_flags, builder);
     let backend = X64Backend::new_with_flags(triple, shared_flags, isa_flags);
-    Box::new(TargetIsaAdapter::new(backend))
+    Box::new(backend)
 }