Strip the _lohi suffix from the isplit instructions.

For symmetry with the vector splitting instructions, we now have:

    isplit iconcat
    vsplit vconcat

No functional change.

docs/langref.rst

@@ -839,8 +839,8 @@ Legalization operations
 These instructions are used as helpers when legalizing types and operations for
 the target ISA.
 
-.. autoinst:: isplit_lohi
+.. autoinst:: isplit
-.. autoinst:: iconcat_lohi
+.. autoinst:: iconcat
 
 Base instruction group
 ======================

filetests/isa/riscv/legalize-abi.cton

@@ -7,9 +7,9 @@ isa riscv
 function int_split_args(i64) -> i64 {
 ebb0(v0: i64):
     ; check: $ebb0($(v0l=$V): i32, $(v0h=$V): i32):
-    ; check: iconcat_lohi $v0l, $v0h
+    ; check: iconcat $v0l, $v0h
     v1 = iadd_imm v0, 1
-    ; check: $(v1l=$V), $(v1h=$V) = isplit_lohi $v1
+    ; check: $(v1l=$V), $(v1h=$V) = isplit $v1
     ; check: return $v1l, $v1h
     return v1
 }
@@ -20,7 +20,7 @@ function split_call_arg(i32) {
 ebb0(v0: i32):
     v1 = uextend.i64 v0
     call fn1(v1)
-    ; check: $(v1l=$V), $(v1h=$V) = isplit_lohi $v1
+    ; check: $(v1l=$V), $(v1h=$V) = isplit $v1
     ; check: call $fn1($v1l, $v1h)
     call fn2(v0, v1)
     ; check: call $fn2($v0, $V, $V)
@@ -33,7 +33,7 @@ ebb0:
     v1 = call fn1()
     ; check: $ebb0:
     ; nextln: $(v1l=$V), $(v1h=$V) = call $fn1()
-    ; check: $(v1new=$V) = iconcat_lohi $v1l, $v1h
+    ; check: $(v1new=$V) = iconcat $v1l, $v1h
     ; check: $v1 = copy $v1new
     jump ebb1(v1)
     ; check: jump $ebb1($v1)
@@ -49,7 +49,7 @@ ebb0:
     v1, v2 = call fn1()
     ; check: $ebb0:
     ; nextln: $v1, $(v2l=$V), $(v2h=$V) = call $fn1()
-    ; check: $(v2new=$V) = iconcat_lohi $v2l, $v2h
+    ; check: $(v2new=$V) = iconcat $v2l, $v2h
     ; check: $v2 -> $v2new
     jump ebb1(v1, v2)
     ; check: jump $ebb1($v1, $v2)
@@ -87,21 +87,21 @@ ebb1(v10: i8):
 function vector_split_args(i64x4) -> i64x4 {
 ebb0(v0: i64x4):
     ; check: $ebb0($(v0al=$V): i32, $(v0ah=$V): i32, $(v0bl=$V): i32, $(v0bh=$V): i32, $(v0cl=$V): i32, $(v0ch=$V): i32, $(v0dl=$V): i32, $(v0dh=$V): i32):
-    ; check: $(v0a=$V) = iconcat_lohi $v0al, $v0ah
+    ; check: $(v0a=$V) = iconcat $v0al, $v0ah
-    ; check: $(v0b=$V) = iconcat_lohi $v0bl, $v0bh
+    ; check: $(v0b=$V) = iconcat $v0bl, $v0bh
     ; check: $(v0ab=$V) = vconcat $v0a, $v0b
-    ; check: $(v0c=$V) = iconcat_lohi $v0cl, $v0ch
+    ; check: $(v0c=$V) = iconcat $v0cl, $v0ch
-    ; check: $(v0d=$V) = iconcat_lohi $v0dl, $v0dh
+    ; check: $(v0d=$V) = iconcat $v0dl, $v0dh
     ; check: $(v0cd=$V) = vconcat $v0c, $v0d
     ; check: $(v0abcd=$V) = vconcat $v0ab, $v0cd
     v1 = iadd v0, v0
     ; check: $(v1ab=$V), $(v1cd=$V) = vsplit
     ; check: $(v1a=$V), $(v1b=$V) = vsplit $v1ab
-    ; check: $(v1al=$V), $(v1ah=$V) = isplit_lohi $v1a
+    ; check: $(v1al=$V), $(v1ah=$V) = isplit $v1a
-    ; check: $(v1bl=$V), $(v1bh=$V) = isplit_lohi $v1b
+    ; check: $(v1bl=$V), $(v1bh=$V) = isplit $v1b
     ; check: $(v1c=$V), $(v1d=$V) = vsplit $v1cd
-    ; check: $(v1cl=$V), $(v1ch=$V) = isplit_lohi $v1c
+    ; check: $(v1cl=$V), $(v1ch=$V) = isplit $v1c
-    ; check: $(v1dl=$V), $(v1dh=$V) = isplit_lohi $v1d
+    ; check: $(v1dl=$V), $(v1dh=$V) = isplit $v1d
     ; check: return $v1al, $v1ah, $v1bl, $v1bh, $v1cl, $v1ch, $v1dl, $v1dh
     return v1
 }

filetests/isa/riscv/legalize-i64.cton

@@ -10,39 +10,39 @@ ebb0(v1: i64, v2: i64):
     v3 = band v1, v2
     return v3
 }
-; check: $(v1l=$V), $(v1h=$VX) = isplit_lohi
+; check: $(v1l=$V), $(v1h=$VX) = isplit
-; check: $(v2l=$V), $(v2h=$VX) = isplit_lohi
+; check: $(v2l=$V), $(v2h=$VX) = isplit
 ; check: [R#ec
 ; sameln: $(v3l=$V) = band $v1l, $v2l
 ; check: [R#ec
 ; sameln: $(v3h=$V) = band $v1h, $v2h
-; check: $v3 = iconcat_lohi $v3l, $v3h
+; check: $v3 = iconcat $v3l, $v3h
 
 function bitwise_or(i64, i64) -> i64 {
 ebb0(v1: i64, v2: i64):
     v3 = bor v1, v2
     return v3
 }
-; check: $(v1l=$V), $(v1h=$VX) = isplit_lohi
+; check: $(v1l=$V), $(v1h=$VX) = isplit
-; check: $(v2l=$V), $(v2h=$VX) = isplit_lohi
+; check: $(v2l=$V), $(v2h=$VX) = isplit
 ; check: [R#cc
 ; sameln: $(v3l=$V) = bor $v1l, $v2l
 ; check: [R#cc
 ; sameln: $(v3h=$V) = bor $v1h, $v2h
-; check: $v3 = iconcat_lohi $v3l, $v3h
+; check: $v3 = iconcat $v3l, $v3h
 
 function bitwise_xor(i64, i64) -> i64 {
 ebb0(v1: i64, v2: i64):
     v3 = bxor v1, v2
     return v3
 }
-; check: $(v1l=$V), $(v1h=$VX) = isplit_lohi
+; check: $(v1l=$V), $(v1h=$VX) = isplit
-; check: $(v2l=$V), $(v2h=$VX) = isplit_lohi
+; check: $(v2l=$V), $(v2h=$VX) = isplit
 ; check: [R#8c
 ; sameln: $(v3l=$V) = bxor $v1l, $v2l
 ; check: [R#8c
 ; sameln: $(v3h=$V) = bxor $v1h, $v2h
-; check: $v3 = iconcat_lohi $v3l, $v3h
+; check: $v3 = iconcat $v3l, $v3h
 
 function arith_add(i64, i64) -> i64 {
 ; Legalizing iadd.i64 requires two steps:
@@ -52,8 +52,8 @@ ebb0(v1: i64, v2: i64):
     v3 = iadd v1, v2
     return v3
 }
-; check: $(v1l=$V), $(v1h=$VX) = isplit_lohi
+; check: $(v1l=$V), $(v1h=$VX) = isplit
-; check: $(v2l=$V), $(v2h=$VX) = isplit_lohi
+; check: $(v2l=$V), $(v2h=$VX) = isplit
 ; check: [R#0c
 ; sameln: $(v3l=$V) = iadd $v1l, $v2l
 ; check: $(c=$V) = icmp ult, $v3l, $v1l
@@ -62,4 +62,4 @@ ebb0(v1: i64, v2: i64):
 ; TODO: This doesn't typecheck. We need to convert the b1 result to i32.
 ; check: [R#0c
 ; sameln: $(v3h=$V) = iadd $v3h1, $c
-; check: $v3 = iconcat_lohi $v3l, $v3h
+; check: $v3 = iconcat $v3l, $v3h

lib/cretonne/meta/base/instructions.py

@@ -1286,8 +1286,8 @@ lo = Operand(
 hi = Operand(
         'hi', WideInt.half_width(), 'The high bits of `x`')
 
-isplit_lohi = Instruction(
+isplit = Instruction(
-        'isplit_lohi', r"""
+        'isplit', r"""
         Split a scalar integer into low and high parts.
 
         Returns the low half of `x` and the high half of `x` as two independent
@@ -1305,8 +1305,8 @@ a = Operand(
         'a', NarrowInt.double_width(),
         doc='The concatenation of `lo` and `hi`')
 
-iconcat_lohi = Instruction(
+iconcat = Instruction(
-        'iconcat_lohi', r"""
+        'iconcat', r"""
         Concatenate low and high bits to form a larger integer type.
         """,
         ins=(lo, hi), outs=a)

lib/cretonne/meta/base/legalize.py

@@ -9,7 +9,7 @@ instructions that are legal.
 from __future__ import absolute_import
 from .instructions import iadd, iadd_cout, iadd_cin, iadd_carry, iadd_imm
 from .instructions import isub, isub_bin, isub_bout, isub_borrow
-from .instructions import band, bor, bxor, isplit_lohi, iconcat_lohi
+from .instructions import band, bor, bxor, isplit, iconcat
 from .instructions import icmp, iconst
 from cdsl.ast import Var
 from cdsl.xform import Rtl, XFormGroup
@@ -54,32 +54,32 @@ ah = Var('ah')
 narrow.legalize(
         a << iadd(x, y),
         Rtl(
-            (xl, xh) << isplit_lohi(x),
+            (xl, xh) << isplit(x),
-            (yl, yh) << isplit_lohi(y),
+            (yl, yh) << isplit(y),
             (al, c) << iadd_cout(xl, yl),
             ah << iadd_cin(xh, yh, c),
-            a << iconcat_lohi(al, ah)
+            a << iconcat(al, ah)
         ))
 
 narrow.legalize(
         a << isub(x, y),
         Rtl(
-            (xl, xh) << isplit_lohi(x),
+            (xl, xh) << isplit(x),
-            (yl, yh) << isplit_lohi(y),
+            (yl, yh) << isplit(y),
             (al, b) << isub_bout(xl, yl),
             ah << isub_bin(xh, yh, b),
-            a << iconcat_lohi(al, ah)
+            a << iconcat(al, ah)
         ))
 
 for bitop in [band, bor, bxor]:
     narrow.legalize(
             a << bitop(x, y),
             Rtl(
-                (xl, xh) << isplit_lohi(x),
+                (xl, xh) << isplit(x),
-                (yl, yh) << isplit_lohi(y),
+                (yl, yh) << isplit(y),
                 al << bitop(xl, yl),
                 ah << bitop(xh, yh),
-                a << iconcat_lohi(al, ah)
+                a << iconcat(al, ah)
             ))
 
 # Expand integer operations with carry for RISC architectures that don't have

lib/cretonne/src/abi.rs

@@ -38,10 +38,10 @@ impl From<ValueConversion> for ArgAction {
 /// Legalization action to be applied to a value that is being passed to or from a legalized ABI.
 #[derive(Clone, Copy, Debug, PartialEq, Eq)]
 pub enum ValueConversion {
-    /// Split an integer types into low and high parts, using `isplit_lohi`.
+    /// Split an integer types into low and high parts, using `isplit`.
     IntSplit,
 
-    /// Split a vector type into halves with identical lane types.
+    /// Split a vector type into halves with identical lane types, using `vsplit`.
     VectorSplit,
 
     /// Bit-cast to an integer type of the same size.

lib/cretonne/src/legalizer/boundary.rs

@@ -210,7 +210,7 @@ fn convert_from_abi<GetArg>(dfg: &mut DataFlowGraph,
             let abi_ty = ty.half_width().expect("Invalid type for conversion");
             let lo = convert_from_abi(dfg, pos, abi_ty, get_arg);
             let hi = convert_from_abi(dfg, pos, abi_ty, get_arg);
-            dfg.ins(pos).iconcat_lohi(lo, hi)
+            dfg.ins(pos).iconcat(lo, hi)
         }
         // Construct a `ty` by concatenating two halves of a vector.
         ValueConversion::VectorSplit => {
@@ -271,7 +271,7 @@ fn convert_to_abi<PutArg>(dfg: &mut DataFlowGraph,
     let ty = dfg.value_type(value);
     match legalize_abi_value(ty, &arg_type) {
         ValueConversion::IntSplit => {
-            let (lo, hi) = dfg.ins(pos).isplit_lohi(value);
+            let (lo, hi) = dfg.ins(pos).isplit(value);
             convert_to_abi(dfg, pos, lo, put_arg);
             convert_to_abi(dfg, pos, hi, put_arg);
         }