Enable more CLIF tests on AArch64
The tests for the SIMD floating-point maximum and minimum operations require particular care because the handling of the NaN values is non-deterministic and may vary between platforms. There is no way to match several NaN values in a test, so the solution is to extract the non-deterministic test cases into a separate file that is subsequently replicated for every backend under test, with adjustments made to the expected results. Copyright (c) 2021, Arm Limited.
This commit is contained in:
@@ -1,4 +1,5 @@
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test run
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target aarch64
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target x86_64 machinst
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function %bint_b8_i128() -> i64, i64 {
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@@ -1,4 +1,5 @@
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test run
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target aarch64
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target x86_64 machinst
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target x86_64 legacy
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@@ -0,0 +1,23 @@
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; Test the non-deterministic aspects of the SIMD arithmetic operations.
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; If you change this file, you should most likely update
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; simd-arithmetic-nondeterministic*.clif as well.
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test run
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target aarch64
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function %fmax_f64x2(f64x2, f64x2) -> f64x2 {
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block0(v0: f64x2, v1: f64x2):
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v2 = fmax v0, v1
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return v2
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}
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; run: %fmax_f64x2([NaN:0x42 0.0], [0x1.0 0.0]) == [NaN:0x42 0.0]
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function %fmin_f64x2(f64x2, f64x2) -> f64x2 {
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block0(v0: f64x2, v1: f64x2):
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v2 = fmin v0, v1
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return v2
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}
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; run: %fmin_f64x2([-NaN 0x100.0], [0.0 NaN]) == [-NaN NaN]
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; run: %fmin_f64x2([NaN 0.0], [0.0 0.0]) == [NaN 0.0]
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; run: %fmin_f64x2([NaN:0x42 0.0], [0x1.0 0.0]) == [NaN:0x42 0.0]
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@@ -0,0 +1,28 @@
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; Test the non-deterministic aspects of the SIMD arithmetic operations.
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; If you change this file, you should most likely update
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; simd-arithmetic-nondeterministic*.clif as well.
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test run
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set enable_simd
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target x86_64 machinst skylake
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function %fmax_f64x2(f64x2, f64x2) -> f64x2 {
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block0(v0: f64x2, v1: f64x2):
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v2 = fmax v0, v1
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return v2
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}
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; note below how NaNs are quieted but (unlike fmin), retain their sign: this discrepancy is allowed by non-determinism
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; in the spec, see https://webassembly.github.io/spec/core/bikeshed/index.html#nan-propagation%E2%91%A0.
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; run: %fmax_f64x2([NaN:0x42 0.0], [0x1.0 0.0]) == [NaN 0.0]
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function %fmin_f64x2(f64x2, f64x2) -> f64x2 {
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block0(v0: f64x2, v1: f64x2):
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v2 = fmin v0, v1
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return v2
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}
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; note below how NaNs are quieted and negative: this is due to non-determinism in the spec for NaNs, see
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; https://webassembly.github.io/spec/core/bikeshed/index.html#nan-propagation%E2%91%A0.
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; run: %fmin_f64x2([-NaN 0x100.0], [0.0 NaN]) == [-NaN -NaN]
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; run: %fmin_f64x2([NaN 0.0], [0.0 0.0]) == [-NaN 0.0]
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; run: %fmin_f64x2([NaN:0x42 0.0], [0x1.0 0.0]) == [-NaN 0.0]
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@@ -1,5 +1,5 @@
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test run
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; target aarch64 TODO: Not yet implemented on aarch64
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target aarch64
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; target s390x TODO: Not yet implemented on s390x
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set enable_simd
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target x86_64 machinst skylake
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@@ -125,7 +125,7 @@ block0:
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; run
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function %sqrt_f64x2(f64x2) -> f64x2 {
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block0(v0: f64x2):
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block0(v0: f64x2):
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v1 = sqrt v0
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return v1
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}
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@@ -136,26 +136,22 @@ block0(v0: f64x2, v1: f64x2):
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v2 = fmax v0, v1
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return v2
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}
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; note below how NaNs are quieted but (unlike fmin), retain their sign: this discrepancy is allowed by non-determinism
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; in the spec, see https://webassembly.github.io/spec/core/bikeshed/index.html#nan-propagation%E2%91%A0.
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; This operation exhibits non-deterministic behaviour for some input NaN values;
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; refer to the simd-arithmetic-nondeterministic*.clif files for the respective tests.
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; run: %fmax_f64x2([-0x0.0 -0x1.0], [+0x0.0 0x1.0]) == [+0x0.0 0x1.0]
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; run: %fmax_f64x2([-NaN NaN], [0x0.0 0x100.0]) == [-NaN NaN]
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; run: %fmax_f64x2([NaN 0.0], [0.0 0.0]) == [NaN 0.0]
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; run: %fmax_f64x2([-NaN 0.0], [0x1.0 0.0]) == [-NaN 0.0]
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; run: %fmax_f64x2([NaN:0x42 0.0], [0x1.0 0.0]) == [NaN 0.0]
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function %fmin_f64x2(f64x2, f64x2) -> f64x2 {
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block0(v0: f64x2, v1: f64x2):
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v2 = fmin v0, v1
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return v2
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}
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; note below how NaNs are quieted and negative: this is due to non-determinism in the spec for NaNs, see
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; https://webassembly.github.io/spec/core/bikeshed/index.html#nan-propagation%E2%91%A0.
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; This operation exhibits non-deterministic behaviour for some input NaN values;
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; refer to the simd-arithmetic-nondeterministic*.clif files for the respective tests.
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; run: %fmin_f64x2([-0x0.0 -0x1.0], [+0x0.0 0x1.0]) == [-0x0.0 -0x1.0]
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; run: %fmin_f64x2([-NaN 0x100.0], [0.0 NaN]) == [-NaN -NaN]
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; run: %fmin_f64x2([NaN 0.0], [0.0 0.0]) == [-NaN 0.0]
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; run: %fmin_f64x2([-NaN 0.0], [0x1.0 0.0]) == [-NaN 0.0]
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; run: %fmin_f64x2([NaN:0x42 0.0], [0x1.0 0.0]) == [-NaN 0.0]
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function %fneg_f64x2(f64x2) -> f64x2 {
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block0(v0: f64x2):
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@@ -1,5 +1,6 @@
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test run
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set enable_simd
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target aarch64
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target x86_64 legacy skylake
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; TODO: once available, replace all lane extraction with `icmp + all_ones`
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@@ -1,5 +1,5 @@
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test run
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; target aarch64 TODO: Not yet implemented on aarch64
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target aarch64
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; target s390x TODO: Not yet implemented on s390x
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set enable_simd
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target x86_64 machinst
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@@ -1,5 +1,5 @@
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test run
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; target aarch64 TODO: Not yet implemented on aarch64
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target aarch64
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; target s390x TODO: Not yet implemented on s390x
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set enable_simd
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target x86_64 machinst
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@@ -1,6 +1,6 @@
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test run
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; target s390x TODO: Not yet implemented on s390x
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; target aarch64 TODO: Not yet implemented on aarch64
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target aarch64
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set enable_simd
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target x86_64 machinst
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set enable_simd
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