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Always call reassign_in for register ABI arguments.

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Even if an argument is already in the correct register, make sure that
we detect conflicts by registering the no-op move. This also means that
the ABI argument register won't be turned into a variable for the
solver.
This commit is contained in:
Jakob Stoklund Olesen
2017-06-14 12:05:47 -07:00
parent 897c363714
commit 96f1228211
2 changed files with 19 additions and 19 deletions
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22
lib/cretonne/src/regalloc/coloring.rs
View File

@@ -430,18 +430,16 @@ impl<'a> Context<'a> {
locations: &EntityMap<Value, ValueLoc>) { locations: &EntityMap<Value, ValueLoc>) {
for (abi, &value) in abi_types.iter().zip(dfg.inst_variable_args(inst)) { for (abi, &value) in abi_types.iter().zip(dfg.inst_variable_args(inst)) {
if let ArgumentLoc::Reg(reg) = abi.location { if let ArgumentLoc::Reg(reg) = abi.location {
let cur_reg = self.divert.reg(value, locations); if let Affinity::Reg(rci) =
if reg != cur_reg { self.liveness
if let Affinity::Reg(rci) = .get(value)
self.liveness .expect("ABI register must have live range")
.get(value) .affinity {
.expect("ABI register must have live range") let rc = self.reginfo.rc(rci);
.affinity { let cur_reg = self.divert.reg(value, locations);
let rc = self.reginfo.rc(rci); self.solver.reassign_in(value, rc, cur_reg, reg);
self.solver.reassign_in(value, rc, cur_reg, reg); } else {
} else { panic!("ABI argument {} should be in a register", value);
panic!("ABI argument {} should be in a register", value);
}
} }
} }
} }

16
lib/cretonne/src/regalloc/solver.rs
View File

@@ -364,13 +364,15 @@ impl Solver {
} }
self.regs_in.free(rc, from); self.regs_in.free(rc, from);
self.regs_out.take(rc, to); self.regs_out.take(rc, to);
self.assignments if from != to {
.insert(Assignment { self.assignments
value, .insert(Assignment {
rc, value,
from, rc,
to, from,
}); to,
});
}
} }
/// Add a variable representing an input side value with an existing register assignment. /// Add a variable representing an input side value with an existing register assignment.