Intel 32-bit encodings for copy.i32.

lib/cretonne/meta/isa/intel/encodings.py

@@ -13,6 +13,8 @@ I32.enc(base.band.i32, *r.rr(0x21))
 I32.enc(base.bor.i32,  *r.rr(0x09))
 I32.enc(base.bxor.i32, *r.rr(0x31))
 
+I32.enc(base.copy.i32, *r.ur(0x89))
+
 # Immediate instructions with sign-extended 8-bit and 32-bit immediate.
 for inst,                   rrr in [
         (base.iadd_imm.i32, 0),

lib/cretonne/meta/isa/intel/recipes.py

@@ -4,8 +4,8 @@ Intel Encoding recipes.
 from __future__ import absolute_import
 from cdsl.isa import EncRecipe
 from cdsl.predicates import IsSignedInt, IsEqual
-from base.formats import UnaryImm, Binary, BinaryImm, Store, Load
-from base.formats import MultiAry, Call, IndirectCall
+from base.formats import Unary, UnaryImm, Binary, BinaryImm, MultiAry
+from base.formats import Call, IndirectCall, Store, Load
 from .registers import GPR, ABCD
 
 try:
@@ -143,6 +143,10 @@ class TailRecipe:
 # XX /r
 rr = TailRecipe('rr', Binary, size=1, ins=(GPR, GPR), outs=0)
 
+# XX /r, but for a unary operator with separate input/output register, like
+# copies.
+ur = TailRecipe('ur', Unary, size=1, ins=GPR, outs=GPR)
+
 # XX /n with one arg in %rcx, for shifts.
 rc = TailRecipe('rc', Binary, size=1, ins=(GPR, GPR.rcx), outs=0)