Rename meta/target -> meta/isa.

Clarify terminology by always referring to a 'Target ISA' instead of just
'Target'. Use 'isa' as a module name instead of 'target' both in Rust and Python
code.

This is only to clarify terminology and not at all because Cargo insists on
using the 'target' sub-directory for build products. Oh, no. Not at all.
This commit is contained in:
Jakob Stoklund Olesen
2016-08-04 11:50:19 -07:00
parent c47c524017
commit 92f84c655b
11 changed files with 54 additions and 54 deletions

View File

@@ -0,0 +1,33 @@
"""
RISC-V Target
-------------
`RISC-V <http://riscv.org/>`_ is an open instruction set architecture
originally developed at UC Berkeley. It is a RISC-style ISA with either a
32-bit (RV32I) or 64-bit (RV32I) base instruction set and a number of optional
extensions:
RV32M / RV64M
Integer multiplication and division.
RV32A / RV64A
Atomics.
RV32F / RV64F
Single-precision IEEE floating point.
RV32D / RV64D
Double-precision IEEE floating point.
RV32G / RV64G
General purpose instruction sets. This represents the union of the I, M, A,
F, and D instruction sets listed above.
"""
import defs
import encodings
# Re-export the primary target ISA definition.
isa = defs.isa