Aarch64: always generate the CFA directive indicating no pointer signing
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@@ -619,9 +619,8 @@ impl ABIMachineSpec for AArch64MachineDeps {
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}
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}
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}
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}
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fn gen_prologue_frame_setup(flags: &settings::Flags) -> SmallInstVec<Inst> {
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fn gen_debug_frame_info(flags: &settings::Flags) -> SmallInstVec<Inst> {
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let mut insts = SmallVec::new();
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let mut insts = SmallVec::new();
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if flags.unwind_info() {
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if flags.unwind_info() {
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insts.push(Inst::Unwind {
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insts.push(Inst::Unwind {
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inst: UnwindInst::Aarch64SetPointerAuth {
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inst: UnwindInst::Aarch64SetPointerAuth {
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@@ -629,6 +628,11 @@ impl ABIMachineSpec for AArch64MachineDeps {
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},
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},
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});
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});
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}
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}
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insts
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}
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fn gen_prologue_frame_setup(flags: &settings::Flags) -> SmallInstVec<Inst> {
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let mut insts = SmallVec::new();
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// stp fp (x29), lr (x30), [sp, #-16]!
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// stp fp (x29), lr (x30), [sp, #-16]!
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insts.push(Inst::StoreP64 {
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insts.push(Inst::StoreP64 {
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@@ -143,7 +143,10 @@ mod tests {
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_ => panic!("expected unwind information"),
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_ => panic!("expected unwind information"),
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};
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};
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assert_eq!(format!("{:?}", fde), "FrameDescriptionEntry { address: Constant(4321), length: 16, lsda: None, instructions: [] }");
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assert_eq!(
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format!("{:?}", fde),
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"FrameDescriptionEntry { address: Constant(4321), length: 16, lsda: None, instructions: [(0, ValExpression(Register(34), Expression { operations: [Simple(DwOp(48))] }))] }"
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);
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}
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}
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fn create_multi_return_function(call_conv: CallConv) -> Function {
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fn create_multi_return_function(call_conv: CallConv) -> Function {
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@@ -417,6 +417,13 @@ pub trait ABIMachineSpec {
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/// Generate a meta-instruction that adjusts the nominal SP offset.
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/// Generate a meta-instruction that adjusts the nominal SP offset.
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fn gen_nominal_sp_adj(amount: i32) -> Self::I;
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fn gen_nominal_sp_adj(amount: i32) -> Self::I;
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/// Generates extra unwind instructions for a new frame for this
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/// architecture, whether the frame has a prologue sequence or not.
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fn gen_debug_frame_info(_flags: &settings::Flags) -> SmallInstVec<Self::I> {
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// By default, generates nothing.
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smallvec![]
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}
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/// Generate the usual frame-setup sequence for this architecture: e.g.,
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/// Generate the usual frame-setup sequence for this architecture: e.g.,
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/// `push rbp / mov rbp, rsp` on x86-64, or `stp fp, lr, [sp, #-16]!` on
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/// `push rbp / mov rbp, rsp` on x86-64, or `stp fp, lr, [sp, #-16]!` on
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/// AArch64.
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/// AArch64.
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@@ -1289,6 +1296,8 @@ impl<M: ABIMachineSpec> ABICallee for ABICalleeImpl<M> {
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self.fixed_frame_storage_size,
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self.fixed_frame_storage_size,
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);
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);
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insts.extend(M::gen_debug_frame_info(&self.flags).into_iter());
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if self.setup_frame {
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if self.setup_frame {
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// set up frame
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// set up frame
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insts.extend(M::gen_prologue_frame_setup(&self.flags).into_iter());
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insts.extend(M::gen_prologue_frame_setup(&self.flags).into_iter());
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