Add Intel encodings for ifcmp_sp.
Also generate an Into<RegUnit> implementation for the RU enums.
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@@ -96,6 +96,9 @@ def gen_isa(isa, fmt):
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with fmt.indented('pub enum RU {', '}'):
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for regbank in isa.regbanks:
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gen_regbank_units(regbank, fmt)
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with fmt.indented('impl Into<RegUnit> for RU {', '}'):
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with fmt.indented('fn into(self) -> RegUnit {', '}'):
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fmt.line('self as RegUnit')
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def generate(isas, out_dir):
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