Add stubs for Intel and ARM architectures.

The Intel ISA handles both 32-bit and 64-bit code.

ARM is split into separate arm32 and arm64 ISAs since the architectures
have little in common in instruction encodings and register files.

lib/cretonne/meta/isa/__init__.py

@@ -7,7 +7,7 @@ architecture supported by Cretonne.
 """
 from __future__ import absolute_import
 from cdsl.isa import TargetISA  # noqa
-from . import riscv
+from . import riscv, intel, arm32, arm64
 
 
 def all_isas():
@@ -16,4 +16,4 @@ def all_isas():
     Get a list of all the supported target ISAs. Each target ISA is represented
     as a :py:class:`cretonne.TargetISA` instance.
     """
-    return [riscv.ISA]
+    return [riscv.ISA, intel.ISA, arm32.ISA, arm64.ISA]