Cranelift: Correctly wrap shifts in constant propagation (#5695)
Fixes #5690 Fixes #5696 Co-authored-by: Jamey Sharp <jsharp@fastly.com>
This commit is contained in:
@@ -81,27 +81,42 @@ macro_rules! isle_common_prelude_methods {
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}
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#[inline]
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fn u64_shl(&mut self, x: u64, y: u64) -> u64 {
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x << y
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fn imm64_shl(&mut self, ty: Type, x: Imm64, y: Imm64) -> Imm64 {
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// Mask off any excess shift bits.
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let shift_mask = (ty.bits() - 1) as u64;
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let y = (y.bits() as u64) & shift_mask;
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// Mask the result to `ty` bits.
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let ty_mask = self.ty_mask(ty) as i64;
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Imm64::new((x.bits() << y) & ty_mask)
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}
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#[inline]
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fn imm64_ushr(&mut self, ty: Type, x: Imm64, y: Imm64) -> Imm64 {
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let shift = u32::checked_sub(64, ty.bits()).unwrap_or(0);
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let mask = u64::MAX >> shift;
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let x = (x.bits() as u64) & mask;
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let y = (y.bits() as u64) & mask;
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let ty_mask = self.ty_mask(ty);
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let x = (x.bits() as u64) & ty_mask;
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// Mask off any excess shift bits.
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let shift_mask = (ty.bits() - 1) as u64;
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let y = (y.bits() as u64) & shift_mask;
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// NB: No need to mask off high bits because they are already zero.
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Imm64::new((x >> y) as i64)
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}
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#[inline]
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fn imm64_sshr(&mut self, ty: Type, x: Imm64, y: Imm64) -> Imm64 {
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// Sign extend `x` from `ty.bits()`-width to the full 64 bits.
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let shift = u32::checked_sub(64, ty.bits()).unwrap_or(0);
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let mask = u64::MAX >> shift;
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let x = (x.bits() as u64) & mask;
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let y = (y.bits() as u64) & mask;
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let sext = |v| ((v << shift) as i64) >> shift;
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Imm64::new(sext(x) >> sext(y))
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let x = (x.bits() << shift) >> shift;
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// Mask off any excess shift bits.
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let shift_mask = (ty.bits() - 1) as i64;
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let y = y.bits() & shift_mask;
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// Mask off sign bits that aren't part of `ty`.
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let ty_mask = self.ty_mask(ty) as i64;
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Imm64::new((x >> y) & ty_mask)
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}
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#[inline]
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@@ -179,14 +194,12 @@ macro_rules! isle_common_prelude_methods {
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#[inline]
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fn ty_mask(&mut self, ty: Type) -> u64 {
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match ty.bits() {
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1 => 1,
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8 => 0xff,
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16 => 0xffff,
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32 => 0xffff_ffff,
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64 => 0xffff_ffff_ffff_ffff,
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_ => unimplemented!(),
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}
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let ty_bits = ty.bits();
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debug_assert_ne!(ty_bits, 0);
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let shift = 64_u64
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.checked_sub(ty_bits.into())
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.expect("unimplemented for > 64 bits");
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u64::MAX >> shift
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}
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fn fits_in_16(&mut self, ty: Type) -> Option<Type> {
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@@ -191,15 +191,15 @@
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;; `(x >> k) << k` is the same as masking off the bottom `k` bits (regardless if
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;; this is a signed or unsigned shift right).
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(rule (simplify (ishl (fits_in_64 ty)
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(ushr ty x (iconst _ (u64_from_imm64 k)))
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(iconst _ (u64_from_imm64 k))))
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(let ((mask u64 (u64_shl 0xFFFFFFFFFFFFFFFF k)))
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(band ty x (iconst ty (imm64_masked ty mask)))))
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(ushr ty x (iconst _ k))
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(iconst _ k)))
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(let ((mask Imm64 (imm64_shl ty (imm64 0xFFFF_FFFF_FFFF_FFFF) k)))
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(band ty x (iconst ty mask))))
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(rule (simplify (ishl (fits_in_64 ty)
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(sshr ty x (iconst _ (u64_from_imm64 k)))
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(iconst _ (u64_from_imm64 k))))
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(let ((mask u64 (u64_shl 0xFFFFFFFFFFFFFFFF k)))
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(band ty x (iconst ty (imm64_masked ty mask)))))
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(sshr ty x (iconst _ k))
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(iconst _ k)))
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(let ((mask Imm64 (imm64_shl ty (imm64 0xFFFF_FFFF_FFFF_FFFF) k)))
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(band ty x (iconst ty mask))))
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;; Rematerialize ALU-op-with-imm and iconsts in each block where they're
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;; used. This is neutral (add-with-imm) or positive (iconst) for
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@@ -56,18 +56,18 @@
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(subsume (iconst ty (imm64_masked ty (u64_not k)))))
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(rule (simplify (ishl (fits_in_64 ty)
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(iconst ty (u64_from_imm64 k1))
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(iconst ty (u64_from_imm64 k2))))
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(subsume (iconst ty (imm64_masked ty (u64_shl k1 k2)))))
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(iconst ty k1)
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(iconst _ k2)))
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(subsume (iconst ty (imm64_shl ty k1 k2))))
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(rule (simplify (ushr (fits_in_64 ty)
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(iconst ty k1)
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(iconst ty k2)))
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(iconst _ k2)))
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(subsume (iconst ty (imm64_ushr ty k1 k2))))
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(rule (simplify (sshr (fits_in_64 ty)
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(iconst ty k1)
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(iconst ty k2)))
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(iconst _ k2)))
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(subsume (iconst ty (imm64_sshr ty k1 k2))))
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(rule (simplify
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@@ -129,8 +129,8 @@
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(decl pure u64_xor (u64 u64) u64)
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(extern constructor u64_xor u64_xor)
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(decl pure u64_shl (u64 u64) u64)
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(extern constructor u64_shl u64_shl)
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(decl pure imm64_shl (Type Imm64 Imm64) Imm64)
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(extern constructor imm64_shl imm64_shl)
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(decl pure imm64_ushr (Type Imm64 Imm64) Imm64)
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(extern constructor imm64_ushr imm64_ushr)
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@@ -87,6 +87,17 @@ block0(v0: i64):
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; return v5
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}
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function %signed_shift_right_shift_left_i8_mask_rhs(i8) -> i8 {
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block0(v0: i8):
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v1 = iconst.i8 0xf5
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v2 = sshr v0, v1
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v3 = ishl v2, v1
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return v3
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; check: v4 = iconst.i8 224
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; check: v5 = band v0, v4
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; return v5
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}
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function %or_and_y_with_not_y_i8(i8, i8) -> i8 {
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block0(v0: i8, v1: i8):
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v2 = band v0, v1
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@@ -34,6 +34,28 @@ block0:
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; check: v3 = iconst.i8 4
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; check: return v3
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function %ishl_i8_i16() -> i8 {
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block0:
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v0 = iconst.i8 1
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v1 = iconst.i16 0xf2
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v2 = ishl v0, v1
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return v2
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}
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; check: v3 = iconst.i8 4
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; check: return v3
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function %ishl_i16_i8() -> i16 {
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block0:
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v0 = iconst.i16 1
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v1 = iconst.i8 0xf2
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v2 = ishl v0, v1
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return v2
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}
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; check: v3 = iconst.i16 4
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; check: return v3
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function %ushr() -> i8 {
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block0:
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v0 = iconst.i8 -1
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@@ -45,6 +67,28 @@ block0:
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; check: v3 = iconst.i8 63
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; check: return v3
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function %ushr_i8_i16() -> i8 {
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block0:
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v0 = iconst.i8 -1
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v1 = iconst.i16 0xf2
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v2 = ushr v0, v1
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return v2
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}
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; check: v3 = iconst.i8 63
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; check: return v3
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function %ushr_i16_i8() -> i16 {
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block0:
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v0 = iconst.i16 -1
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v1 = iconst.i8 0xf2
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v2 = ushr v0, v1
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return v2
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}
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; check: v3 = iconst.i16 0x3fff
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; check: return v3
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function %sshr() -> i8 {
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block0:
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v0 = iconst.i8 0xf0
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@@ -53,7 +97,29 @@ block0:
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return v2
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}
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; check: v3 = iconst.i8 -4
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; check: v3 = iconst.i8 252
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; check: return v3
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function %sshr_i8_i16() -> i8 {
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block0:
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v0 = iconst.i8 0xf0
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v1 = iconst.i16 0xf2
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v2 = sshr v0, v1
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return v2
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}
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; check: v3 = iconst.i8 252
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; check: return v3
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function %sshr_i16_i8() -> i16 {
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block0:
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v0 = iconst.i16 0xfff0
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v1 = iconst.i8 0xf2
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v2 = sshr v0, v1
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return v2
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}
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; check: v3 = iconst.i16 0xfffc
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; check: return v3
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function %icmp_eq_i32() -> i8 {
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29
cranelift/filetests/filetests/runtests/issue-5690.clif
Normal file
29
cranelift/filetests/filetests/runtests/issue-5690.clif
Normal file
@@ -0,0 +1,29 @@
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test interpret
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test run
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set opt_level=speed
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set enable_simd=true
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set enable_safepoints=true
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set unwind_info=false
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set preserve_frame_pointers=true
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set machine_code_cfg_info=true
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set enable_table_access_spectre_mitigation=false
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target aarch64
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target x86_64
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function %u1() -> i64 sext, f64, i8, i8 sext, i8 sext system_v {
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block0:
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v0 = f64const 0x1.8373638ff3738p-124
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v1 = iconst.i8 53
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v2 = iconst.i64 0x4445_00ff_ffff_ffff
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v3 = iconst.i8 0
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v4 = iconst.i16 0
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v5 = iconst.i32 0
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v6 = iconst.i64 0
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v7 = uextend.i128 v6
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v8 = ishl v2, v2
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v9 = rotr v1, v1
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nop
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return v8, v0, v9, v9, v9
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}
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; run: %u1() == [-9223372036854775808, 0x1.8373638ff3738p-124, -87, -87, -87]
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20
cranelift/filetests/filetests/wasm/issue-5696.wat
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20
cranelift/filetests/filetests/wasm/issue-5696.wat
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@@ -0,0 +1,20 @@
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;;! target = "x86_64"
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;;! optimize = true
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;;! settings = ["opt_level=speed"]
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(module
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(func (;0;) (param i64) (result i64)
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i64.const 32
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i64.const -19
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i64.shr_u
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;; call 0
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)
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)
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;; function u0:0(i64, i64 vmctx) -> i64 fast {
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;; block0(v0: i64, v1: i64):
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;; @001e jump block1
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;;
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;; block1:
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;; v6 = iconst.i64 0
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;; @001e return v6 ; v6 = 0
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;; }
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@@ -24,6 +24,7 @@ pub fn run(path: &Path, wat: &str) -> Result<()> {
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let config: TestConfig =
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toml::from_str(&config_text).context("failed to parse the test configuration")?;
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log::debug!("Wasm test config = {config:#?}");
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config
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.validate()
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@@ -117,6 +117,7 @@ impl FuncTranslator {
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parse_function_body(validator, reader, &mut builder, &mut self.state, environ)?;
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builder.finalize();
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log::trace!("translated Wasm to CLIF:\n{}", func.display());
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Ok(())
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}
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}
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