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Restrict uextend and sextend to scalar integers (#5953)

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This commit is contained in:
Trevor Elliott
2023-03-07 11:10:50 -08:00
committed by GitHub
parent b44f67b6d7
commit 709257011e
2 changed files with 47 additions and 37 deletions
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18
cranelift/codegen/meta/src/shared/instructions.rs
View File

@@ -3213,14 +3213,13 @@ pub(crate) fn define(
.operands_out(vec![a]),
);
{
let IntTo = &TypeVar::new(
"IntTo",
"A larger integer type with the same number of lanes",
TypeSetBuilder::new()
.ints(Interval::All)
.simd_lanes(Interval::All)
.build(),
TypeSetBuilder::new().ints(Interval::All).build(),
);
let x = &Operand::new("x", Int);
let a = &Operand::new("a", IntTo);
@@ -3263,6 +3262,16 @@ pub(crate) fn define(
.operands_in(vec![x])
.operands_out(vec![a]),
);
}
let IntTo = &TypeVar::new(
"IntTo",
"A larger integer type with the same number of lanes",
TypeSetBuilder::new()
.ints(Interval::All)
.simd_lanes(Interval::All)
.build(),
);
let FloatTo = &TypeVar::new(
"FloatTo",
@@ -3272,6 +3281,7 @@ pub(crate) fn define(
.simd_lanes(Interval::All)
.build(),
);
let x = &Operand::new("x", Float);
let a = &Operand::new("a", FloatTo);

20
cranelift/codegen/src/isa/s390x/lower.isle
View File

@@ -931,14 +931,14 @@
(put_in_reg_zext64 x))
;; 128-bit target types.
(rule (lower (has_type (vr128_ty ty) (uextend x @ (value_type $I8))))
(vec_insert_lane $I8X16 (vec_imm ty 0) x 15 (zero_reg)))
(rule (lower (has_type (vr128_ty ty) (uextend x @ (value_type $I16))))
(vec_insert_lane $I16X8 (vec_imm ty 0) x 7 (zero_reg)))
(rule (lower (has_type (vr128_ty ty) (uextend x @ (value_type $I32))))
(vec_insert_lane $I32X4 (vec_imm ty 0) x 3 (zero_reg)))
(rule (lower (has_type (vr128_ty ty) (uextend x @ (value_type $I64))))
(vec_insert_lane $I64X2 (vec_imm ty 0) x 1 (zero_reg)))
(rule (lower (has_type $I128 (uextend x @ (value_type $I8))))
(vec_insert_lane $I8X16 (vec_imm $I128 0) x 15 (zero_reg)))
(rule (lower (has_type $I128 (uextend x @ (value_type $I16))))
(vec_insert_lane $I16X8 (vec_imm $I128 0) x 7 (zero_reg)))
(rule (lower (has_type $I128 (uextend x @ (value_type $I32))))
(vec_insert_lane $I32X4 (vec_imm $I128 0) x 3 (zero_reg)))
(rule (lower (has_type $I128 (uextend x @ (value_type $I64))))
(vec_insert_lane $I64X2 (vec_imm $I128 0) x 1 (zero_reg)))
;;;; Rules for `sextend` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -952,9 +952,9 @@
(put_in_reg_sext64 x))
;; 128-bit target types.
(rule (lower (has_type (vr128_ty ty) (sextend x)))
(rule (lower (has_type $I128 (sextend x)))
(let ((x_ext Reg (put_in_reg_sext64 x)))
(mov_to_vec128 ty (ashr_imm $I64 x_ext 63) x_ext)))
(mov_to_vec128 $I128 (ashr_imm $I64 x_ext 63) x_ext)))
;;;; Rules for `snarrow` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;