Add a RISC-V target.

Flesh out the directory structure for defining target instruction set
architectures. Use RISC-V as a startgin point because it is so simple.
This commit is contained in:
Jakob Stoklund Olesen
2016-04-06 11:32:43 -07:00
parent 5388f68437
commit 6e2e7bfb73
6 changed files with 83 additions and 3 deletions

View File

@@ -1,3 +1 @@
*.pyc
Cargo.lock
target