Add Intel encodings for trapif.

This is implemented as a macro with a conditional jump over a ud2. This
way, we don't have to split up EBBs at every conditional trap.

lib/cretonne/src/isa/intel/binemit.rs

@@ -2,7 +2,7 @@
 
 use binemit::{CodeSink, Reloc, bad_encoding};
 use ir::{Function, Inst, Ebb, InstructionData, Opcode};
-use ir::condcodes::{IntCC, FloatCC};
+use ir::condcodes::{CondCode, IntCC, FloatCC};
 use isa::{RegUnit, StackRef, StackBase, StackBaseMask};
 use regalloc::RegDiversions;
 use super::registers::RU;