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Remove non-existent x86 encoding for sshr_imm.i64x2

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This instruction does not exist in the SSE2 feature set; it can be added later with an VEX/EVEX encoding.
This commit is contained in:
Andrew Brown
2020-05-21 15:25:20 -07:00
parent df171f01b5
commit 5a32500518
2 changed files with 5 additions and 8 deletions
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7
cranelift/codegen/meta/src/isa/x86/encodings.rs
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@@ -2184,8 +2184,11 @@ fn define_simd(
let ushr_imm = ushr_imm.bind(vector(*ty, sse_vector_size));
e.enc_both_inferred(ushr_imm, rec_f_ib.opcodes(*opcodes).rrr(2));
let sshr_imm = sshr_imm.bind(vector(*ty, sse_vector_size));
e.enc_both_inferred(sshr_imm, rec_f_ib.opcodes(*opcodes).rrr(4));
// One exception: PSRAQ does not exist in for 64x2 in SSE2, it requires a higher CPU feature set.
if *ty != I64 {
let sshr_imm = sshr_imm.bind(vector(*ty, sse_vector_size));
e.enc_both_inferred(sshr_imm, rec_f_ib.opcodes(*opcodes).rrr(4));
}
}
// SIMD integer comparisons