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Use uppercase for the global riscv.ISA constant.

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This commit is contained in:
Jakob Stoklund Olesen
2016-11-11 11:17:40 -08:00
parent 5e4602efb4
commit 581294dafe
4 changed files with 8 additions and 8 deletions
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2
lib/cretonne/meta/isa/__init__.py
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@@ -16,4 +16,4 @@ def all_isas():
Get a list of all the supported target ISAs. Each target ISA is represented Get a list of all the supported target ISAs. Each target ISA is represented
as a :py:class:`cretonne.TargetISA` instance. as a :py:class:`cretonne.TargetISA` instance.
""" """
return [riscv.isa] return [riscv.ISA]

2
lib/cretonne/meta/isa/riscv/__init__.py
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@@ -29,4 +29,4 @@ from . import defs
from . import encodings, settings # noqa from . import encodings, settings # noqa
# Re-export the primary target ISA definition. # Re-export the primary target ISA definition.
isa = defs.isa.finish() ISA = defs.ISA.finish()

6
lib/cretonne/meta/isa/riscv/defs.py
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@@ -7,8 +7,8 @@ from __future__ import absolute_import
from cdsl.isa import TargetISA, CPUMode from cdsl.isa import TargetISA, CPUMode
import base.instructions import base.instructions
isa = TargetISA('riscv', [base.instructions.GROUP]) ISA = TargetISA('riscv', [base.instructions.GROUP])
# CPU modes for 32-bit and 64-bit operation. # CPU modes for 32-bit and 64-bit operation.
RV32 = CPUMode('RV32', isa) RV32 = CPUMode('RV32', ISA)
RV64 = CPUMode('RV64', isa) RV64 = CPUMode('RV64', ISA)

6
lib/cretonne/meta/isa/riscv/settings.py
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@@ -5,9 +5,9 @@ from __future__ import absolute_import
from cdsl.settings import SettingGroup, BoolSetting from cdsl.settings import SettingGroup, BoolSetting
from cdsl.predicates import And from cdsl.predicates import And
import base.settings as shared import base.settings as shared
from .defs import isa from .defs import ISA
isa.settings = SettingGroup('riscv', parent=shared.group) ISA.settings = SettingGroup('riscv', parent=shared.group)
supports_m = BoolSetting("CPU supports the 'M' extension (mul/div)") supports_m = BoolSetting("CPU supports the 'M' extension (mul/div)")
supports_a = BoolSetting("CPU supports the 'A' extension (atomics)") supports_a = BoolSetting("CPU supports the 'A' extension (atomics)")
@@ -25,4 +25,4 @@ use_d = And(supports_d, shared.enable_float)
full_float = And(shared.enable_simd, supports_f, supports_d) full_float = And(shared.enable_simd, supports_f, supports_d)
isa.settings.close(globals()) ISA.settings.close(globals())