Use the target-lexicon crate.
This switches from a custom list of architectures to use the target-lexicon crate. - "set is_64bit=1; isa x86" is replaced with "target x86_64", and similar for other architectures, and the `is_64bit` flag is removed entirely. - The `is_compressed` flag is removed too; it's no longer being used to control REX prefixes on x86-64, ARM and Thumb are separate architectures in target-lexicon, and we can figure out how to select RISC-V compressed encodings when we're ready.
This commit is contained in:
Dan Gohman
@@ -31,6 +31,7 @@ serde_derive = "1.0.8"
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term = "0.5.1"
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capstone = "0.3.1"
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wabt = { version = "0.3", optional = true }
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target-lexicon = "0.0.0"
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[features]
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default = ["wasm"]
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@@ -125,15 +125,15 @@ The ``set`` lines apply settings cumulatively::
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test legalizer
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set opt_level=best
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set is_64bit=1
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isa riscv
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set is_64bit=0
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isa riscv supports_m=false
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set is_pic=1
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isa riscv64
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set is_pic=0
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isa riscv32 supports_m=false
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function %foo() {}
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This example will run the legalizer test twice. Both runs will have
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``opt_level=best``, but they will have different ``is_64bit`` settings. The 32-bit
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``opt_level=best``, but they will have different ``is_pic`` settings. The 32-bit
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run will also have the RISC-V specific flag ``supports_m`` disabled.
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The filetests are run automatically as part of `cargo test`, and they can
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@@ -1,6 +1,6 @@
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; Test the legalization of function signatures for RV32E.
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test legalizer
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isa riscv enable_e
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target riscv32 enable_e
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; regex: V=v\d+
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@@ -1,6 +1,6 @@
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; Test the legalization of function signatures.
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test legalizer
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isa riscv
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target riscv32
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; regex: V=v\d+
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@@ -1,6 +1,6 @@
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; Binary emission of 32-bit code.
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test binemit
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isa riscv
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target riscv32
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function %RV32I(i32 link [%x1]) -> i32 link [%x1] {
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sig0 = ()
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@@ -1,5 +1,5 @@
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test legalizer
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isa riscv supports_m=1
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target riscv32 supports_m=1
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function %int32(i32, i32) {
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ebb0(v1: i32, v2: i32):
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@@ -1,11 +1,9 @@
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; Test the legalization of i32 instructions that don't have RISC-V versions.
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test legalizer
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set is_64bit=0
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isa riscv supports_m=1
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target riscv32 supports_m=1
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set is_64bit=1
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isa riscv supports_m=1
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target riscv64 supports_m=1
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; regex: V=v\d+
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@@ -1,6 +1,6 @@
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; Test legalizer's handling of ABI boundaries.
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test legalizer
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isa riscv
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target riscv32
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; regex: V=v\d+
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; regex: SS=ss\d+
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@@ -1,6 +1,6 @@
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; Test the legalization of i64 arithmetic instructions.
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test legalizer
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isa riscv supports_m=1
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target riscv32 supports_m=1
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; regex: V=v\d+
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@@ -1,6 +1,6 @@
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; Test the parser's support for encoding annotations.
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test legalizer
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isa riscv
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target riscv32
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function %parse_encoding(i32 [%x5]) -> i32 [%x10] {
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; check: function %parse_encoding(i32 [%x5], i32 link [%x1]) -> i32 [%x10], i32 link [%x1] fast {
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@@ -1,6 +1,6 @@
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; Test tracking of register moves.
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test binemit
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isa riscv
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target riscv32
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function %regmoves(i32 link [%x1]) -> i32 link [%x1] {
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ebb0(v9999: i32):
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@@ -1,6 +1,6 @@
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; Test the legalization of EBB arguments that are split.
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test legalizer
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isa riscv
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target riscv32
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; regex: V=v\d+
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@@ -1,5 +1,5 @@
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test verifier
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isa riscv
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target riscv32
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function %RV32I(i32 link [%x1]) -> i32 link [%x1] {
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fn0 = %foo()
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@@ -1,5 +1,5 @@
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test regalloc
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isa x86
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target i686
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; %rdi can't be used in a movsbl instruction, so test that the register
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; allocator can move it to a register that can be.
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@@ -1,6 +1,5 @@
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test compile
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set is_64bit=1
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isa x86 haswell
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target x86_64 haswell
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function %foo(i64, i64, i64, i32) -> b1 system_v {
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ebb3(v0: i64, v1: i64, v2: i64, v3: i32):
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@@ -1,6 +1,6 @@
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; Test the legalization of function signatures.
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test legalizer
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isa x86
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target i686
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; regex: V=v\d+
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@@ -1,7 +1,6 @@
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; Test the legalization of function signatures.
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test legalizer
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set is_64bit
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isa x86
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target x86_64
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; regex: V=v\d+
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@@ -2,7 +2,7 @@
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test binemit
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set opt_level=best
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set allones_funcaddrs
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isa x86 haswell
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target i686 haswell
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; The binary encodings can be verified with the command:
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;
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@@ -1,9 +1,8 @@
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; binary emission of 64-bit code.
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test binemit
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set is_64bit
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set opt_level=best
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set allones_funcaddrs
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isa x86 haswell
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target x86_64 haswell
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; The binary encodings can be verified with the command:
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;
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@@ -1,7 +1,5 @@
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test compile
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set is_64bit
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isa x86 baseline
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target x86_64 baseline
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; clz/ctz on 64 bit operands
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@@ -1,7 +1,6 @@
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test binemit
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set is_64bit
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set opt_level=best
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isa x86 baseline
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target x86_64 baseline
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; The binary encodings can be verified with the command:
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;
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@@ -1,6 +1,6 @@
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; Binary emission of 32-bit floating point code.
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test binemit
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isa x86 haswell
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target i686 haswell
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; The binary encodings can be verified with the command:
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;
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@@ -1,7 +1,7 @@
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; binary emission of x86-32 code.
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test binemit
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set opt_level=best
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isa x86 haswell
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target i686 haswell
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; The binary encodings can be verified with the command:
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;
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@@ -1,8 +1,7 @@
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; Binary emission of 64-bit floating point code.
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test binemit
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set is_64bit
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set opt_level=best
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isa x86 haswell
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target x86_64 haswell
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; The binary encodings can be verified with the command:
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;
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@@ -1,9 +1,8 @@
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; binary emission of 64-bit code.
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test binemit
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set is_64bit
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set opt_level=best
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set is_pic
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isa x86 haswell
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target x86_64 haswell
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; The binary encodings can be verified with the command:
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;
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@@ -1,8 +1,7 @@
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; binary emission of x86-64 code.
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test binemit
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set is_64bit
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set opt_level=best
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isa x86 haswell
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target x86_64 haswell
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; The binary encodings can be verified with the command:
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;
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@@ -1,8 +1,7 @@
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; Test legalization of a non-colocated call in 64-bit non-PIC mode.
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test legalizer
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set is_64bit
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set opt_level=best
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isa x86 haswell
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target x86_64 haswell
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function %call() {
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fn0 = %foo()
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@@ -1,8 +1,7 @@
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; Test the custom legalizations.
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test legalizer
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isa x86
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set is_64bit
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isa x86
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target i686
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target x86_64
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; regex: V=v\d+
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; regex: EBB=ebb\d+
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@@ -1,9 +1,8 @@
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; Test the division legalizations.
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test legalizer
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set is_64bit
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; See also legalize-div.cton.
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set avoid_div_traps=1
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isa x86
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target x86_64
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; regex: V=v\d+
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; regex: EBB=ebb\d+
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@@ -1,9 +1,8 @@
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; Test the division legalizations.
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test legalizer
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set is_64bit
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; See also legalize-div-traps.cton.
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set avoid_div_traps=0
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isa x86
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target x86_64
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; regex: V=v\d+
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; regex: EBB=ebb\d+
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@@ -1,10 +1,9 @@
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test legalizer
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; Pre-SSE 4.1, we need to use runtime library calls for floating point rounding operations.
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set is_64bit
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set is_pic
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set call_conv=system_v
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isa x86
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target x86_64
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function %floor(f32) -> f32 {
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ebb0(v0: f32):
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@@ -1,7 +1,6 @@
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; Test the legalization of memory objects.
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test legalizer
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set is_64bit
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isa x86
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target x86_64
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; regex: V=v\d+
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; regex: EBB=ebb\d+
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@@ -1,7 +1,5 @@
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test compile
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set is_64bit
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isa x86 baseline
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target x86_64 baseline
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; umulhi/smulhi on 64 bit operands
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@@ -1,7 +1,6 @@
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; Check that floating-point constants equal to zero are optimized correctly.
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test binemit
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set is_64bit=0
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isa x86
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target i686
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function %foo() -> f32 fast {
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ebb0:
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@@ -1,7 +1,6 @@
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; Check that floating-point constants equal to zero are optimized correctly.
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test binemit
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set is_64bit=1
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isa x86
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target x86_64
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function %zero_const_32bit_no_rex() -> f32 fast {
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ebb0:
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@@ -1,8 +1,7 @@
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test compile
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set is_64bit=1
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set colocated_libcalls=1
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set probestack_func_adjusts_sp=1
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isa x86
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target x86_64
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; Like %big in probestack.cton, but with the probestack function adjusting
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; the stack pointer itself.
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@@ -1,8 +1,7 @@
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test compile
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set is_64bit=1
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set colocated_libcalls=1
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set probestack_enabled=0
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isa x86
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target x86_64
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; Like %big in probestack.cton, but with probes disabled.
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@@ -1,6 +1,5 @@
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test compile
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set is_64bit=1
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isa x86
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target x86_64
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; Like %big in probestack.cton, but without a colocated libcall.
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@@ -1,8 +1,7 @@
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test compile
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set is_64bit=1
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set colocated_libcalls=1
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set probestack_size_log2=13
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isa x86
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target x86_64
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; Like %big in probestack.cton, but now the probestack size is bigger
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; and it no longer needs a probe.
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@@ -1,7 +1,6 @@
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test compile
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set is_64bit=1
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set colocated_libcalls=1
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isa x86
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target x86_64
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; A function with a big stack frame. This should have a stack probe.
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@@ -1,8 +1,7 @@
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test compile
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set is_64bit
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set opt_level=best
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set is_pic
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isa x86 haswell
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target x86_64 haswell
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; An empty function.
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||||
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||||
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@@ -1,7 +1,6 @@
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test binemit
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set is_64bit=1
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set opt_level=best
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isa x86
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target x86_64
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; Test that instruction shrinking eliminates REX prefixes when possible.
|
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|
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@@ -1,8 +1,7 @@
|
||||
test compile
|
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set is_64bit
|
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set opt_level=best
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set is_pic
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isa x86 haswell
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target x86_64 haswell
|
||||
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; check if for one arg we use the right register
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function %one_arg(i64) windows_fastcall {
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@@ -1,6 +1,6 @@
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test cat
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||||
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||||
isa riscv
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target riscv32
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; regex: WS=[ \t]*
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||||
|
||||
|
||||
@@ -1,5 +1,5 @@
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test postopt
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isa x86
|
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target i686
|
||||
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||||
; Test that compare+branch sequences are folded effectively on x86.
|
||||
|
||||
|
||||
@@ -1,6 +1,5 @@
|
||||
test postopt
|
||||
set is_64bit
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||||
isa x86
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||||
target x86_64
|
||||
|
||||
function %dual_loads(i64, i64) -> i64 {
|
||||
ebb0(v0: i64, v1: i64):
|
||||
|
||||
@@ -1,6 +1,5 @@
|
||||
|
||||
test preopt
|
||||
isa x86 baseline
|
||||
target i686 baseline
|
||||
|
||||
; Cases where the denominator is created by an iconst
|
||||
|
||||
|
||||
@@ -1,6 +1,5 @@
|
||||
|
||||
test preopt
|
||||
isa x86 baseline
|
||||
target i686 baseline
|
||||
|
||||
; -------- U32 --------
|
||||
|
||||
|
||||
@@ -1,6 +1,5 @@
|
||||
|
||||
test preopt
|
||||
isa x86 baseline
|
||||
target i686 baseline
|
||||
|
||||
; -------- U32 --------
|
||||
|
||||
|
||||
@@ -1,6 +1,5 @@
|
||||
|
||||
test preopt
|
||||
isa x86 baseline
|
||||
target i686 baseline
|
||||
|
||||
; -------- U32 --------
|
||||
|
||||
|
||||
@@ -1,6 +1,5 @@
|
||||
|
||||
test preopt
|
||||
isa x86 baseline
|
||||
target i686 baseline
|
||||
|
||||
; -------- U32 --------
|
||||
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
test preopt
|
||||
isa x86
|
||||
target i686
|
||||
|
||||
function %iadd_imm(i32) -> i32 {
|
||||
ebb0(v0: i32):
|
||||
|
||||
@@ -1,6 +1,5 @@
|
||||
test regalloc
|
||||
set is_64bit
|
||||
isa x86 haswell
|
||||
target x86_64 haswell
|
||||
|
||||
function %value_aliases(i32, f32, i64 vmctx) baldrdash {
|
||||
gv0 = vmctx
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
test regalloc
|
||||
|
||||
; We can add more ISAs once they have defined encodings.
|
||||
isa riscv
|
||||
target riscv32
|
||||
|
||||
; regex: RX=%x\d+
|
||||
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
test regalloc
|
||||
isa riscv
|
||||
target riscv32
|
||||
|
||||
; Test the coalescer.
|
||||
; regex: V=v\d+
|
||||
|
||||
@@ -1,6 +1,5 @@
|
||||
test regalloc
|
||||
set is_64bit
|
||||
isa x86 haswell
|
||||
target x86_64 haswell
|
||||
|
||||
; Reported as https://github.com/cretonne/cretonne/issues/207
|
||||
;
|
||||
|
||||
@@ -1,6 +1,5 @@
|
||||
test regalloc
|
||||
set is_64bit
|
||||
isa x86 haswell
|
||||
target x86_64 haswell
|
||||
|
||||
; Reported as https://github.com/cretonne/cretonne/issues/216 from the Binaryen fuzzer.
|
||||
;
|
||||
|
||||
@@ -1,6 +1,5 @@
|
||||
test regalloc
|
||||
set is_64bit
|
||||
isa x86 haswell
|
||||
target x86_64 haswell
|
||||
|
||||
function %pr227(i32 [%rdi], i32 [%rsi], i32 [%rdx], i32 [%rcx], i64 vmctx [%r8]) system_v {
|
||||
gv0 = vmctx
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
test regalloc
|
||||
isa x86
|
||||
target i686
|
||||
|
||||
; regex: V=v\d+
|
||||
; regex: REG=%r([abcd]x|[sd]i)
|
||||
|
||||
@@ -1,6 +1,5 @@
|
||||
test regalloc
|
||||
set is_64bit
|
||||
isa x86 haswell
|
||||
target x86_64 haswell
|
||||
|
||||
; This test case would create an EBB parameter that was a ghost value.
|
||||
; The coalescer would insert a copy of the ghost value, leading to verifier errors.
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
test regalloc
|
||||
isa x86
|
||||
target i686
|
||||
|
||||
; This test covers the troubles when values with global live ranges are defined
|
||||
; by instructions with constrained register classes.
|
||||
|
||||
@@ -1,6 +1,5 @@
|
||||
test regalloc
|
||||
set is_64bit=1
|
||||
isa x86 haswell
|
||||
target x86_64 haswell
|
||||
|
||||
function %foo() system_v {
|
||||
ebb4:
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
test regalloc
|
||||
isa riscv
|
||||
target riscv32
|
||||
|
||||
; Here, the coalescer initially builds vreg0 = [v1, v2, v3]
|
||||
;
|
||||
|
||||
@@ -1,6 +1,5 @@
|
||||
test regalloc
|
||||
set is_64bit
|
||||
isa x86 haswell
|
||||
target x86_64 haswell
|
||||
|
||||
function u0:9(i64 [%rdi], f32 [%xmm0], f64 [%xmm1], i32 [%rsi], i32 [%rdx], i64 vmctx [%r14]) -> i64 [%rax] baldrdash {
|
||||
ebb0(v0: i64, v1: f32, v2: f64, v3: i32, v4: i32, v5: i64):
|
||||
|
||||
@@ -1,6 +1,5 @@
|
||||
test regalloc
|
||||
set is_64bit
|
||||
isa x86 haswell
|
||||
target x86_64 haswell
|
||||
|
||||
; Test combinations of constraints.
|
||||
;
|
||||
|
||||
@@ -1,6 +1,5 @@
|
||||
test regalloc
|
||||
set is_64bit=1
|
||||
isa x86 haswell
|
||||
target x86_64 haswell
|
||||
|
||||
function %test(i64) -> i64 system_v {
|
||||
ebb0(v0: i64):
|
||||
|
||||
@@ -1,6 +1,5 @@
|
||||
test regalloc
|
||||
set is_64bit
|
||||
isa x86 haswell
|
||||
target x86_64 haswell
|
||||
|
||||
; regex: V=v\d+
|
||||
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
test regalloc
|
||||
isa riscv enable_e
|
||||
target riscv32 enable_e
|
||||
|
||||
; regex: V=v\d+
|
||||
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
test regalloc
|
||||
isa x86 haswell
|
||||
target i686 haswell
|
||||
|
||||
function %pr165() system_v {
|
||||
ebb0:
|
||||
|
||||
@@ -1,6 +1,5 @@
|
||||
test regalloc
|
||||
set is_64bit
|
||||
isa x86
|
||||
target x86_64
|
||||
|
||||
; Test case found by the Binaryen fuzzer.
|
||||
;
|
||||
|
||||
@@ -12,7 +12,7 @@ test regalloc
|
||||
; regex: V=v\d+
|
||||
; regex: WS=\s+
|
||||
|
||||
isa riscv enable_e
|
||||
target riscv32 enable_e
|
||||
|
||||
; In straight-line code, the first value defined is spilled.
|
||||
; That is in order:
|
||||
|
||||
@@ -1,9 +1,8 @@
|
||||
; Use "test compile" here otherwise the dead blocks won't be eliminated.
|
||||
test compile
|
||||
|
||||
set is_64bit
|
||||
set probestack_enabled=0
|
||||
isa x86 haswell
|
||||
target x86_64 haswell
|
||||
|
||||
; This function contains unreachable blocks which trip up the register
|
||||
; allocator if they don't get cleared out.
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
test regalloc
|
||||
|
||||
isa x86
|
||||
target i686
|
||||
|
||||
; regex: V=v\d+
|
||||
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
test verifier
|
||||
isa x86
|
||||
target i686
|
||||
|
||||
; Simple, correct use of CPU flags.
|
||||
function %simple(i32) -> i32 {
|
||||
|
||||
@@ -1,11 +1,9 @@
|
||||
; Test basic code generation for control flow WebAssembly instructions.
|
||||
test compile
|
||||
|
||||
set is_64bit=0
|
||||
isa x86 haswell
|
||||
target i686 haswell
|
||||
|
||||
set is_64bit=1
|
||||
isa x86 haswell
|
||||
target x86_64 haswell
|
||||
|
||||
function %br_if(i32) -> i32 {
|
||||
ebb0(v0: i32):
|
||||
|
||||
@@ -1,8 +1,7 @@
|
||||
; Test code generation for WebAssembly type conversion operators.
|
||||
test compile
|
||||
|
||||
set is_64bit=1
|
||||
isa x86 haswell
|
||||
target x86_64 haswell
|
||||
|
||||
function %i32_wrap_i64(i64) -> i32 {
|
||||
ebb0(v0: i64):
|
||||
|
||||
@@ -1,17 +1,10 @@
|
||||
; Test basic code generation for f32 arithmetic WebAssembly instructions.
|
||||
test compile
|
||||
|
||||
set is_64bit=0
|
||||
isa x86 haswell
|
||||
|
||||
set is_64bit=0
|
||||
isa x86 baseline
|
||||
|
||||
set is_64bit=1
|
||||
isa x86 haswell
|
||||
|
||||
set is_64bit=1
|
||||
isa x86 baseline
|
||||
target i686 haswell
|
||||
target i686 baseline
|
||||
target x86_64 haswell
|
||||
target x86_64 baseline
|
||||
|
||||
; Constants.
|
||||
|
||||
|
||||
@@ -1,11 +1,9 @@
|
||||
; Test code generation for WebAssembly f32 comparison operators.
|
||||
test compile
|
||||
|
||||
set is_64bit=0
|
||||
isa x86 haswell
|
||||
target i686 haswell
|
||||
|
||||
set is_64bit=1
|
||||
isa x86 haswell
|
||||
target x86_64 haswell
|
||||
|
||||
function %f32_eq(f32, f32) -> i32 {
|
||||
ebb0(v0: f32, v1: f32):
|
||||
|
||||
@@ -3,8 +3,7 @@ test compile
|
||||
|
||||
; We only test on 64-bit since the heap_addr instructions and vmctx parameters
|
||||
; explicitly mention the pointer width.
|
||||
set is_64bit=1
|
||||
isa x86 haswell
|
||||
target x86_64 haswell
|
||||
|
||||
function %f32_load(i32, i64 vmctx) -> f32 {
|
||||
gv0 = vmctx
|
||||
|
||||
@@ -1,11 +1,8 @@
|
||||
; Test basic code generation for f64 arithmetic WebAssembly instructions.
|
||||
test compile
|
||||
|
||||
set is_64bit=1
|
||||
isa x86 haswell
|
||||
|
||||
set is_64bit=1
|
||||
isa x86 baseline
|
||||
target x86_64 haswell
|
||||
target x86_64 baseline
|
||||
|
||||
; Constants.
|
||||
|
||||
|
||||
@@ -1,11 +1,9 @@
|
||||
; Test code generation for WebAssembly f64 comparison operators.
|
||||
test compile
|
||||
|
||||
set is_64bit=0
|
||||
isa x86 haswell
|
||||
target i686 haswell
|
||||
|
||||
set is_64bit=1
|
||||
isa x86 haswell
|
||||
target x86_64 haswell
|
||||
|
||||
function %f64_eq(f64, f64) -> i32 {
|
||||
ebb0(v0: f64, v1: f64):
|
||||
|
||||
@@ -3,8 +3,7 @@ test compile
|
||||
|
||||
; We only test on 64-bit since the heap_addr instructions and vmctx parameters
|
||||
; explicitly mention the pointer width.
|
||||
set is_64bit=1
|
||||
isa x86 haswell
|
||||
target x86_64 haswell
|
||||
|
||||
function %f64_load(i32, i64 vmctx) -> f64 {
|
||||
gv0 = vmctx
|
||||
|
||||
@@ -1,17 +1,10 @@
|
||||
; Test basic code generation for i32 arithmetic WebAssembly instructions.
|
||||
test compile
|
||||
|
||||
set is_64bit=0
|
||||
isa x86 haswell
|
||||
|
||||
set is_64bit=0
|
||||
isa x86 baseline
|
||||
|
||||
set is_64bit=1
|
||||
isa x86 haswell
|
||||
|
||||
set is_64bit=1
|
||||
isa x86 baseline
|
||||
target i686 haswell
|
||||
target i686 baseline
|
||||
target x86_64 haswell
|
||||
target x86_64 baseline
|
||||
|
||||
; Constants.
|
||||
|
||||
|
||||
@@ -1,11 +1,9 @@
|
||||
; Test code generation for WebAssembly i32 comparison operators.
|
||||
test compile
|
||||
|
||||
set is_64bit=0
|
||||
isa x86 haswell
|
||||
target i686 haswell
|
||||
|
||||
set is_64bit=1
|
||||
isa x86 haswell
|
||||
target x86_64 haswell
|
||||
|
||||
function %i32_eqz(i32) -> i32 {
|
||||
ebb0(v0: i32):
|
||||
|
||||
@@ -3,8 +3,7 @@ test compile
|
||||
|
||||
; We only test on 64-bit since the heap_addr instructions and vmctx parameters
|
||||
; explicitly mention the pointer width.
|
||||
set is_64bit=1
|
||||
isa x86 haswell
|
||||
target x86_64 haswell
|
||||
|
||||
function %i32_load(i32, i64 vmctx) -> i32 {
|
||||
gv0 = vmctx
|
||||
|
||||
@@ -1,11 +1,8 @@
|
||||
; Test basic code generation for i64 arithmetic WebAssembly instructions.
|
||||
test compile
|
||||
|
||||
set is_64bit=1
|
||||
isa x86 haswell
|
||||
|
||||
set is_64bit=1
|
||||
isa x86 baseline
|
||||
target x86_64 haswell
|
||||
target x86_64 baseline
|
||||
|
||||
; Constants.
|
||||
|
||||
|
||||
@@ -1,8 +1,7 @@
|
||||
; Test code generation for WebAssembly i64 comparison operators.
|
||||
test compile
|
||||
|
||||
set is_64bit=1
|
||||
isa x86 haswell
|
||||
target x86_64 haswell
|
||||
|
||||
function %i64_eqz(i64) -> i32 {
|
||||
ebb0(v0: i64):
|
||||
|
||||
@@ -3,8 +3,7 @@ test compile
|
||||
|
||||
; We only test on 64-bit since the heap_addr instructions and vmctx parameters
|
||||
; explicitly mention the pointer width.
|
||||
set is_64bit=1
|
||||
isa x86 haswell
|
||||
target x86_64 haswell
|
||||
|
||||
function %i64_load(i32, i64 vmctx) -> i64 {
|
||||
gv0 = vmctx
|
||||
|
||||
@@ -1,11 +1,9 @@
|
||||
; Test basic code generation for the select WebAssembly instruction.
|
||||
test compile
|
||||
|
||||
set is_64bit=0
|
||||
isa x86 haswell
|
||||
target i686 haswell
|
||||
|
||||
set is_64bit=1
|
||||
isa x86 haswell
|
||||
target x86_64 haswell
|
||||
|
||||
function %select_i32(i32, i32, i32) -> i32 {
|
||||
ebb0(v0: i32, v1: i32, v2: i32):
|
||||
|
||||
@@ -20,6 +20,9 @@ git = "https://github.com/rust-fuzz/libfuzzer-sys.git"
|
||||
[dependencies.cretonne-wasm]
|
||||
path = "../lib/wasm"
|
||||
|
||||
[dependencies.target-lexicon]
|
||||
version = "0.0.0"
|
||||
|
||||
# Prevent this from interfering with workspaces
|
||||
[workspace]
|
||||
members = ["."]
|
||||
|
||||
@@ -3,13 +3,16 @@
|
||||
extern crate libfuzzer_sys;
|
||||
extern crate binaryen;
|
||||
extern crate cretonne_wasm;
|
||||
#[macro_use]
|
||||
extern crate target_lexicon;
|
||||
use cretonne_wasm::{translate_module, DummyEnvironment};
|
||||
use std::str::FromStr;
|
||||
|
||||
fuzz_target!(|data: &[u8]| {
|
||||
let binaryen_module = binaryen::tools::translate_to_fuzz_mvp(data);
|
||||
|
||||
let wasm = binaryen_module.write();
|
||||
|
||||
let mut dummy_environ = DummyEnvironment::default();
|
||||
let mut dummy_environ = DummyEnvironment::with_triple(triple!("x86_64"));
|
||||
translate_module(&wasm, &mut dummy_environ).unwrap();
|
||||
});
|
||||
|
||||
@@ -9,7 +9,8 @@ use cretonne_codegen::{binemit, ir};
|
||||
use cretonne_reader::parse_test;
|
||||
use std::path::Path;
|
||||
use std::path::PathBuf;
|
||||
use utils::{parse_sets_and_isa, read_to_string};
|
||||
use target_lexicon::Architecture;
|
||||
use utils::{parse_sets_and_triple, read_to_string};
|
||||
|
||||
struct PrintRelocs {
|
||||
flag_print: bool,
|
||||
@@ -64,7 +65,7 @@ pub fn run(
|
||||
flag_set: &[String],
|
||||
flag_isa: &str,
|
||||
) -> Result<(), String> {
|
||||
let parsed = parse_sets_and_isa(flag_set, flag_isa)?;
|
||||
let parsed = parse_sets_and_triple(flag_set, flag_isa)?;
|
||||
|
||||
for filename in files {
|
||||
let path = Path::new(&filename);
|
||||
@@ -136,23 +137,28 @@ fn handle_module(
|
||||
}
|
||||
|
||||
fn get_disassembler(isa: &TargetIsa) -> Result<Capstone, String> {
|
||||
let cs = match isa.name() {
|
||||
"riscv" => return Err(String::from("No disassembler for RiscV")),
|
||||
"x86" => {
|
||||
if isa.flags().is_64bit() {
|
||||
Capstone::new()
|
||||
.x86()
|
||||
.mode(arch::x86::ArchMode::Mode64)
|
||||
.build()
|
||||
} else {
|
||||
Capstone::new()
|
||||
.x86()
|
||||
.mode(arch::x86::ArchMode::Mode32)
|
||||
.build()
|
||||
}
|
||||
let cs = match isa.triple().architecture {
|
||||
Architecture::Riscv32 | Architecture::Riscv64 => {
|
||||
return Err(String::from("No disassembler for RiscV"))
|
||||
}
|
||||
"arm32" => Capstone::new().arm().mode(arch::arm::ArchMode::Arm).build(),
|
||||
"arm64" => Capstone::new()
|
||||
Architecture::I386 | Architecture::I586 | Architecture::I686 => Capstone::new()
|
||||
.x86()
|
||||
.mode(arch::x86::ArchMode::Mode32)
|
||||
.build(),
|
||||
Architecture::X86_64 => Capstone::new()
|
||||
.x86()
|
||||
.mode(arch::x86::ArchMode::Mode64)
|
||||
.build(),
|
||||
Architecture::Arm
|
||||
| Architecture::Armv4t
|
||||
| Architecture::Armv5te
|
||||
| Architecture::Armv7
|
||||
| Architecture::Armv7s => Capstone::new().arm().mode(arch::arm::ArchMode::Arm).build(),
|
||||
Architecture::Thumbv6m | Architecture::Thumbv7em | Architecture::Thumbv7m => Capstone::new(
|
||||
).arm()
|
||||
.mode(arch::arm::ArchMode::Thumb)
|
||||
.build(),
|
||||
Architecture::Aarch64 => Capstone::new()
|
||||
.arm64()
|
||||
.mode(arch::arm64::ArchMode::Arm)
|
||||
.build(),
|
||||
|
||||
@@ -27,6 +27,7 @@ cfg_if! {
|
||||
mod wasm;
|
||||
}
|
||||
}
|
||||
extern crate target_lexicon;
|
||||
|
||||
use cretonne_codegen::{timing, VERSION};
|
||||
use docopt::Docopt;
|
||||
@@ -47,8 +48,8 @@ Usage:
|
||||
cton-util cat <file>...
|
||||
cton-util filecheck [-v] <file>
|
||||
cton-util print-cfg <file>...
|
||||
cton-util compile [-vpT] [--set <set>]... [--isa <isa>] <file>...
|
||||
cton-util wasm [-ctvpTs] [--set <set>]... [--isa <isa>] <file>...
|
||||
cton-util compile [-vpT] [--set <set>]... [--target <triple>] <file>...
|
||||
cton-util wasm [-ctvpTs] [--set <set>]... [--target <triple>] <file>...
|
||||
cton-util --help | --version
|
||||
|
||||
Options:
|
||||
@@ -64,7 +65,8 @@ Options:
|
||||
-p, --print print the resulting Cretonne IR
|
||||
-h, --help print this help message
|
||||
--set=<set> configure Cretonne settings
|
||||
--isa=<isa> specify the Cretonne ISA
|
||||
--target=<triple>
|
||||
specify the Cretonne target
|
||||
--version print the Cretonne version
|
||||
|
||||
";
|
||||
@@ -83,7 +85,7 @@ struct Args {
|
||||
flag_print: bool,
|
||||
flag_verbose: bool,
|
||||
flag_set: Vec<String>,
|
||||
flag_isa: String,
|
||||
flag_target: String,
|
||||
flag_time_passes: bool,
|
||||
flag_print_size: bool,
|
||||
}
|
||||
@@ -116,7 +118,7 @@ fn cton_util() -> CommandResult {
|
||||
args.arg_file,
|
||||
args.flag_print,
|
||||
&args.flag_set,
|
||||
&args.flag_isa,
|
||||
&args.flag_target,
|
||||
)
|
||||
} else if args.cmd_wasm {
|
||||
#[cfg(feature = "wasm")]
|
||||
@@ -127,7 +129,7 @@ fn cton_util() -> CommandResult {
|
||||
args.flag_check_translation,
|
||||
args.flag_print,
|
||||
&args.flag_set,
|
||||
&args.flag_isa,
|
||||
&args.flag_target,
|
||||
args.flag_print_size,
|
||||
);
|
||||
|
||||
|
||||
@@ -7,6 +7,8 @@ use cretonne_reader::{parse_options, Location};
|
||||
use std::fs::File;
|
||||
use std::io::{self, Read};
|
||||
use std::path::Path;
|
||||
use std::str::FromStr;
|
||||
use target_lexicon::Triple;
|
||||
|
||||
/// Read an entire file into a string.
|
||||
pub fn read_to_string<P: AsRef<Path>>(path: P) -> io::Result<String> {
|
||||
@@ -40,8 +42,11 @@ impl OwnedFlagsOrIsa {
|
||||
}
|
||||
}
|
||||
|
||||
/// Parse "set" and "isa" commands.
|
||||
pub fn parse_sets_and_isa(flag_set: &[String], flag_isa: &str) -> Result<OwnedFlagsOrIsa, String> {
|
||||
/// Parse "set" and "triple" commands.
|
||||
pub fn parse_sets_and_triple(
|
||||
flag_set: &[String],
|
||||
flag_triple: &str,
|
||||
) -> Result<OwnedFlagsOrIsa, String> {
|
||||
let mut flag_builder = settings::builder();
|
||||
parse_options(
|
||||
flag_set.iter().map(|x| x.as_str()),
|
||||
@@ -49,12 +54,21 @@ pub fn parse_sets_and_isa(flag_set: &[String], flag_isa: &str) -> Result<OwnedFl
|
||||
&Location { line_number: 0 },
|
||||
).map_err(|err| err.to_string())?;
|
||||
|
||||
let mut words = flag_isa.trim().split_whitespace();
|
||||
// Look for `isa foo`.
|
||||
if let Some(isa_name) = words.next() {
|
||||
let mut isa_builder = isa::lookup(isa_name).map_err(|err| match err {
|
||||
isa::LookupError::Unknown => format!("unknown ISA '{}'", isa_name),
|
||||
isa::LookupError::Unsupported => format!("support for ISA '{}' not enabled", isa_name),
|
||||
let mut words = flag_triple.trim().split_whitespace();
|
||||
// Look for `target foo`.
|
||||
if let Some(triple_name) = words.next() {
|
||||
let triple = match Triple::from_str(triple_name) {
|
||||
Ok(triple) => triple,
|
||||
Err(parse_error) => return Err(format!("{}", parse_error)),
|
||||
};
|
||||
let mut isa_builder = isa::lookup(triple).map_err(|err| match err {
|
||||
isa::LookupError::SupportDisabled => {
|
||||
format!("support for triple '{}' is disabled", triple_name)
|
||||
}
|
||||
isa::LookupError::Unsupported => format!(
|
||||
"support for triple '{}' is not implemented yet",
|
||||
triple_name
|
||||
),
|
||||
})?;
|
||||
// Apply the ISA-specific settings to `isa_builder`.
|
||||
parse_options(words, &mut isa_builder, &Location { line_number: 0 })
|
||||
|
||||
@@ -12,7 +12,7 @@ use std::error::Error;
|
||||
use std::path::Path;
|
||||
use std::path::PathBuf;
|
||||
use term;
|
||||
use utils::{parse_sets_and_isa, read_to_end};
|
||||
use utils::{parse_sets_and_triple, read_to_end};
|
||||
use wabt::wat2wasm;
|
||||
|
||||
macro_rules! vprintln {
|
||||
@@ -38,10 +38,10 @@ pub fn run(
|
||||
flag_check_translation: bool,
|
||||
flag_print: bool,
|
||||
flag_set: &[String],
|
||||
flag_isa: &str,
|
||||
flag_triple: &str,
|
||||
flag_print_size: bool,
|
||||
) -> Result<(), String> {
|
||||
let parsed = parse_sets_and_isa(flag_set, flag_isa)?;
|
||||
let parsed = parse_sets_and_triple(flag_set, flag_triple)?;
|
||||
|
||||
for filename in files {
|
||||
let path = Path::new(&filename);
|
||||
@@ -79,9 +79,7 @@ fn handle_module(
|
||||
vprint!(flag_verbose, "Translating... ");
|
||||
terminal.reset().unwrap();
|
||||
|
||||
let mut data = read_to_end(path.clone()).map_err(|err| {
|
||||
String::from(err.description())
|
||||
})?;
|
||||
let mut data = read_to_end(path.clone()).map_err(|err| String::from(err.description()))?;
|
||||
|
||||
if !data.starts_with(&[b'\0', b'a', b's', b'm']) {
|
||||
data = match wat2wasm(&data) {
|
||||
@@ -90,10 +88,9 @@ fn handle_module(
|
||||
};
|
||||
}
|
||||
|
||||
let mut dummy_environ = DummyEnvironment::with_flags(fisa.flags.clone());
|
||||
translate_module(&data, &mut dummy_environ).map_err(
|
||||
|e| e.to_string(),
|
||||
)?;
|
||||
let mut dummy_environ =
|
||||
DummyEnvironment::with_triple_flags(fisa.isa.unwrap().triple().clone(), fisa.flags.clone());
|
||||
translate_module(&data, &mut dummy_environ).map_err(|e| e.to_string())?;
|
||||
|
||||
terminal.fg(term::color::GREEN).unwrap();
|
||||
vprintln!(flag_verbose, "ok");
|
||||
@@ -142,24 +139,22 @@ fn handle_module(
|
||||
let mut context = Context::new();
|
||||
context.func = func.clone();
|
||||
if flag_check_translation {
|
||||
context.verify(fisa).map_err(|err| {
|
||||
pretty_verifier_error(&context.func, fisa.isa, &err)
|
||||
})?;
|
||||
context
|
||||
.verify(fisa)
|
||||
.map_err(|err| pretty_verifier_error(&context.func, fisa.isa, &err))?;
|
||||
} else if let Some(isa) = fisa.isa {
|
||||
let compiled_size = context.compile(isa).map_err(|err| {
|
||||
pretty_error(&context.func, fisa.isa, err)
|
||||
})?;
|
||||
let compiled_size = context
|
||||
.compile(isa)
|
||||
.map_err(|err| pretty_error(&context.func, fisa.isa, err))?;
|
||||
if flag_print_size {
|
||||
println!(
|
||||
"Function #{} code size: {} bytes",
|
||||
func_index,
|
||||
compiled_size
|
||||
func_index, compiled_size
|
||||
);
|
||||
total_module_code_size += compiled_size;
|
||||
println!(
|
||||
"Function #{} bytecode size: {} bytes",
|
||||
func_index,
|
||||
dummy_environ.func_bytecode_sizes[def_index]
|
||||
func_index, dummy_environ.func_bytecode_sizes[def_index]
|
||||
);
|
||||
}
|
||||
} else {
|
||||
|
||||
Reference in New Issue
Block a user