4e67e08efd
This switches from a custom list of architectures to use the target-lexicon crate. - "set is_64bit=1; isa x86" is replaced with "target x86_64", and similar for other architectures, and the `is_64bit` flag is removed entirely. - The `is_compressed` flag is removed too; it's no longer being used to control REX prefixes on x86-64, ARM and Thumb are separate architectures in target-lexicon, and we can figure out how to select RISC-V compressed encodings when we're ready.
25 lines
673 B
Plaintext
25 lines
673 B
Plaintext
test cat
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target riscv32
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; regex: WS=[ \t]*
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function %foo(i32, i32) {
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ebb1(v0: i32 [%x8], v1: i32):
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[-,-] v2 = iadd v0, v1
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[-] trap heap_oob
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[R#1234, %x5, %x11] v6, v7 = iadd_cout v2, v0
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[Rshamt#beef, %x25] v8 = ishl_imm v6, 2
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@55 v9 = iadd v8, v7
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@a5 [Iret#5] return v0, v8
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}
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; sameln: function %foo(i32, i32) fast {
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; nextln: ebb1(v0: i32 [%x8], v1: i32):
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; nextln: [-,-]$WS v2 = iadd v0, v1
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; nextln: [-]$WS trap heap_oob
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; nextln: [R#1234,%x5,%x11]$WS v6, v7 = iadd_cout v2, v0
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; nextln: [Rshamt#beef,%x25]$WS v8 = ishl_imm v6, 2
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; nextln: @0055 [-,-]$WS v9 = iadd v8, v7
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; nextln: @00a5 [Iret#05]$WS return v0, v8
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; nextln: }
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