aarch64: Add sbcs instruction encodings

2021-06-09 09:15:15 +01:00
parent 61f07d79a7
commit 4d085d8fbf
3 changed files with 27 additions and 0 deletions
--- a/cranelift/codegen/src/isa/aarch64/inst/mod.rs
+++ b/cranelift/codegen/src/isa/aarch64/inst/mod.rs
@@ -93,6 +93,9 @@ pub enum ALUOp {
    /// Subtract with carry
    Sbc32,
    Sbc64,
+    /// Subtract with carry, settings flags
+    SbcS32,
+    SbcS64,
 }

 /// An ALU operation with three arguments.
@@ -3219,6 +3222,8 @@ impl Inst {
                ALUOp::AdcS64 => ("adcs", OperandSize::Size64),
                ALUOp::Sbc32 => ("sbc", OperandSize::Size32),
                ALUOp::Sbc64 => ("sbc", OperandSize::Size64),
+                ALUOp::SbcS32 => ("sbcs", OperandSize::Size32),
+                ALUOp::SbcS64 => ("sbcs", OperandSize::Size64),
            }
        }