CL/aarch64 back end: implement the wasm SIMD bitmask instructions
The `bitmask.{8x16,16x8,32x4}` instructions do not map neatly to any single
AArch64 SIMD instruction, and instead need a sequence of around ten
instructions. Because of this, this patch is somewhat longer and more complex
than it would be for (eg) x64.
Main changes are:
* the relevant testsuite test (`simd_boolean.wast`) has been enabled on aarch64.
* at the CLIF level, add a new instruction `vhigh_bits`, into which these wasm
instructions are to be translated.
* in the wasm->CLIF translation (code_translator.rs), translate into
`vhigh_bits`. This is straightforward.
* in the CLIF->AArch64 translation (lower_inst.rs), translate `vhigh_bits`
into equivalent sequences of AArch64 instructions. There is a different
sequence for each of the `{8x16, 16x8, 32x4}` variants.
All other changes are AArch64-specific, and add instruction definitions needed
by the previous step:
* Add two new families of AArch64 instructions: `VecShiftImm` (vector shift by
immediate) and `VecExtract` (effectively a double-length vector shift)
* To the existing AArch64 family `VecRRR`, add a `zip1` variant. To the
`VecLanesOp` family add an `addv` variant.
* Add supporting code for the above changes to AArch64 instructions:
- getting the register uses (`aarch64_get_regs`)
- mapping the registers (`aarch64_map_regs`)
- printing instructions
- emitting instructions (`impl MachInstEmit for Inst`). The handling of
`VecShiftImm` is a bit complex.
- emission tests for new instructions and variants.
This commit is contained in:
committed by
julian-seward1
parent
b10e027fef
commit
2702942050
6
build.rs
6
build.rs
@@ -229,8 +229,12 @@ fn ignore(testsuite: &str, testname: &str, strategy: &str) -> bool {
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return env::var("CARGO_CFG_TARGET_ARCH").unwrap() != "x86_64";
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}
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// This is only implemented on aarch64.
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("simd", "simd_boolean") => {
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return env::var("CARGO_CFG_TARGET_ARCH").unwrap() != "aarch64";
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}
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// These tests have simd operators which aren't implemented yet.
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("simd", "simd_boolean") => return true,
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("simd", "simd_f32x4_pmin_pmax") => return true,
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("simd", "simd_f32x4_rounding") => return true,
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("simd", "simd_f64x2_pmin_pmax") => return true,
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