Merge pull request #3274 from bnjbvr/fix-m1

A round of Mac M1 fixes

cranelift/codegen/src/isa/aarch64/abi.rs

@@ -619,9 +619,8 @@ impl ABIMachineSpec for AArch64MachineDeps {
         }
     }
 
-    fn gen_prologue_frame_setup(flags: &settings::Flags) -> SmallInstVec<Inst> {
+    fn gen_debug_frame_info(flags: &settings::Flags) -> SmallInstVec<Inst> {
         let mut insts = SmallVec::new();
-
         if flags.unwind_info() {
             insts.push(Inst::Unwind {
                 inst: UnwindInst::Aarch64SetPointerAuth {
@@ -629,6 +628,11 @@ impl ABIMachineSpec for AArch64MachineDeps {
                 },
             });
         }
+        insts
+    }
+
+    fn gen_prologue_frame_setup(flags: &settings::Flags) -> SmallInstVec<Inst> {
+        let mut insts = SmallVec::new();
 
         // stp fp (x29), lr (x30), [sp, #-16]!
         insts.push(Inst::StoreP64 {

cranelift/codegen/src/isa/aarch64/inst/unwind/systemv.rs

@@ -143,7 +143,10 @@ mod tests {
             _ => panic!("expected unwind information"),
         };
 
-        assert_eq!(format!("{:?}", fde), "FrameDescriptionEntry { address: Constant(4321), length: 16, lsda: None, instructions: [] }");
+        assert_eq!(
+            format!("{:?}", fde),
+            "FrameDescriptionEntry { address: Constant(4321), length: 16, lsda: None, instructions: [(0, ValExpression(Register(34), Expression { operations: [Simple(DwOp(48))] }))] }"
+        );
     }
 
     fn create_multi_return_function(call_conv: CallConv) -> Function {

cranelift/codegen/src/isa/mod.rs

@@ -314,6 +314,21 @@ pub trait TargetIsa: fmt::Display + Send + Sync {
         }
     }
 
+    /// Returns the code (text) section alignment for this ISA.
+    fn code_section_alignment(&self) -> u64 {
+        use target_lexicon::*;
+        match (self.triple().operating_system, self.triple().architecture) {
+            (
+                OperatingSystem::MacOSX { .. }
+                | OperatingSystem::Darwin
+                | OperatingSystem::Ios
+                | OperatingSystem::Tvos,
+                Architecture::Aarch64(..),
+            ) => 0x4000,
+            _ => 0x1000,
+        }
+    }
+
     /// Get the pointer type of this ISA.
     fn pointer_type(&self) -> ir::Type {
         ir::Type::int(u16::from(self.pointer_bits())).unwrap()

cranelift/codegen/src/machinst/abi_impl.rs

@@ -417,6 +417,13 @@ pub trait ABIMachineSpec {
     /// Generate a meta-instruction that adjusts the nominal SP offset.
     fn gen_nominal_sp_adj(amount: i32) -> Self::I;
 
+    /// Generates extra unwind instructions for a new frame  for this
+    /// architecture, whether the frame has a prologue sequence or not.
+    fn gen_debug_frame_info(_flags: &settings::Flags) -> SmallInstVec<Self::I> {
+        // By default, generates nothing.
+        smallvec![]
+    }
+
     /// Generate the usual frame-setup sequence for this architecture: e.g.,
     /// `push rbp / mov rbp, rsp` on x86-64, or `stp fp, lr, [sp, #-16]!` on
     /// AArch64.
@@ -1289,6 +1296,8 @@ impl<M: ABIMachineSpec> ABICallee for ABICalleeImpl<M> {
                 self.fixed_frame_storage_size,
             );
 
+            insts.extend(M::gen_debug_frame_info(&self.flags).into_iter());
+
             if self.setup_frame {
                 // set up frame
                 insts.extend(M::gen_prologue_frame_setup(&self.flags).into_iter());