diff --git a/.github/workflows/main.yml b/.github/workflows/main.yml
index fe1957cdd4..e4df8a470a 100644
--- a/.github/workflows/main.yml
+++ b/.github/workflows/main.yml
@@ -166,12 +166,6 @@ jobs:
     - run: cargo check --target wasm32-unknown-emscripten -p wasi-common
     - run: cargo check --target armv7-unknown-linux-gnueabihf -p wasi-common
 
-    # Check that codegen and wasm crates typecheck on 1.43.0; this is required
-    # for Firefox.
-    - run: rustup install 1.43.0
-    - run: cargo +1.43.0 check -p cranelift-codegen
-    - run: cargo +1.43.0 check -p cranelift-wasm
-
   fuzz_targets:
     name: Fuzz Targets
     runs-on: ubuntu-latest
diff --git a/cranelift/codegen/src/isa/aarch64/abi.rs b/cranelift/codegen/src/isa/aarch64/abi.rs
index 46eabe5de5..2a869185d4 100644
--- a/cranelift/codegen/src/isa/aarch64/abi.rs
+++ b/cranelift/codegen/src/isa/aarch64/abi.rs
@@ -619,9 +619,8 @@ impl ABIMachineSpec for AArch64MachineDeps {
         }
     }
 
-    fn gen_prologue_frame_setup(flags: &settings::Flags) -> SmallInstVec<Inst> {
+    fn gen_debug_frame_info(flags: &settings::Flags) -> SmallInstVec<Inst> {
         let mut insts = SmallVec::new();
-
         if flags.unwind_info() {
             insts.push(Inst::Unwind {
                 inst: UnwindInst::Aarch64SetPointerAuth {
@@ -629,6 +628,11 @@ impl ABIMachineSpec for AArch64MachineDeps {
                 },
             });
         }
+        insts
+    }
+
+    fn gen_prologue_frame_setup(flags: &settings::Flags) -> SmallInstVec<Inst> {
+        let mut insts = SmallVec::new();
 
         // stp fp (x29), lr (x30), [sp, #-16]!
         insts.push(Inst::StoreP64 {
diff --git a/cranelift/codegen/src/isa/aarch64/inst/unwind/systemv.rs b/cranelift/codegen/src/isa/aarch64/inst/unwind/systemv.rs
index 8f7edda09c..ade3767789 100644
--- a/cranelift/codegen/src/isa/aarch64/inst/unwind/systemv.rs
+++ b/cranelift/codegen/src/isa/aarch64/inst/unwind/systemv.rs
@@ -143,7 +143,10 @@ mod tests {
             _ => panic!("expected unwind information"),
         };
 
-        assert_eq!(format!("{:?}", fde), "FrameDescriptionEntry { address: Constant(4321), length: 16, lsda: None, instructions: [] }");
+        assert_eq!(
+            format!("{:?}", fde),
+            "FrameDescriptionEntry { address: Constant(4321), length: 16, lsda: None, instructions: [(0, ValExpression(Register(34), Expression { operations: [Simple(DwOp(48))] }))] }"
+        );
     }
 
     fn create_multi_return_function(call_conv: CallConv) -> Function {
diff --git a/cranelift/codegen/src/isa/mod.rs b/cranelift/codegen/src/isa/mod.rs
index 80a2599d38..3331534c49 100644
--- a/cranelift/codegen/src/isa/mod.rs
+++ b/cranelift/codegen/src/isa/mod.rs
@@ -314,6 +314,21 @@ pub trait TargetIsa: fmt::Display + Send + Sync {
         }
     }
 
+    /// Returns the code (text) section alignment for this ISA.
+    fn code_section_alignment(&self) -> u64 {
+        use target_lexicon::*;
+        match (self.triple().operating_system, self.triple().architecture) {
+            (
+                OperatingSystem::MacOSX { .. }
+                | OperatingSystem::Darwin
+                | OperatingSystem::Ios
+                | OperatingSystem::Tvos,
+                Architecture::Aarch64(..),
+            ) => 0x4000,
+            _ => 0x1000,
+        }
+    }
+
     /// Get the pointer type of this ISA.
     fn pointer_type(&self) -> ir::Type {
         ir::Type::int(u16::from(self.pointer_bits())).unwrap()
diff --git a/cranelift/codegen/src/machinst/abi_impl.rs b/cranelift/codegen/src/machinst/abi_impl.rs
index db37a5f81b..0da169b42c 100644
--- a/cranelift/codegen/src/machinst/abi_impl.rs
+++ b/cranelift/codegen/src/machinst/abi_impl.rs
@@ -417,6 +417,13 @@ pub trait ABIMachineSpec {
     /// Generate a meta-instruction that adjusts the nominal SP offset.
     fn gen_nominal_sp_adj(amount: i32) -> Self::I;
 
+    /// Generates extra unwind instructions for a new frame  for this
+    /// architecture, whether the frame has a prologue sequence or not.
+    fn gen_debug_frame_info(_flags: &settings::Flags) -> SmallInstVec<Self::I> {
+        // By default, generates nothing.
+        smallvec![]
+    }
+
     /// Generate the usual frame-setup sequence for this architecture: e.g.,
     /// `push rbp / mov rbp, rsp` on x86-64, or `stp fp, lr, [sp, #-16]!` on
     /// AArch64.
@@ -1289,6 +1296,8 @@ impl<M: ABIMachineSpec> ABICallee for ABICalleeImpl<M> {
                 self.fixed_frame_storage_size,
             );
 
+            insts.extend(M::gen_debug_frame_info(&self.flags).into_iter());
+
             if self.setup_frame {
                 // set up frame
                 insts.extend(M::gen_prologue_frame_setup(&self.flags).into_iter());
diff --git a/crates/cranelift/src/obj.rs b/crates/cranelift/src/obj.rs
index edd462e1e2..e8807834ec 100644
--- a/crates/cranelift/src/obj.rs
+++ b/crates/cranelift/src/obj.rs
@@ -425,11 +425,10 @@ impl<'a> ObjectBuilder<'a> {
         }
 
         // Finish up the text section now that we're done adding functions.
-        const CODE_SECTION_ALIGNMENT: u64 = 0x1000;
         let text = self.text.finish();
         self.obj
             .section_mut(self.text_section)
-            .set_data(text, CODE_SECTION_ALIGNMENT);
+            .set_data(text, self.isa.code_section_alignment());
 
         // With all functions added we can also emit the fully-formed unwinding
         // information sections.
@@ -457,7 +456,8 @@ impl<'a> ObjectBuilder<'a> {
 
         // Page-align the text section so the unwind info can reside on a
         // separate page that doesn't need executable permissions.
-        self.obj.append_section_data(self.text_section, &[], 0x1000);
+        self.obj
+            .append_section_data(self.text_section, &[], self.isa.code_section_alignment());
 
         let segment = self.obj.segment_name(StandardSegment::Data).to_vec();
         let section_id = self.obj.add_section(
@@ -527,10 +527,12 @@ impl<'a> ObjectBuilder<'a> {
         cie.fde_address_encoding = gimli::constants::DW_EH_PE_pcrel;
         let cie_id = table.add_cie(cie);
 
-        // This write will align the text section to a page boundary (0x1000)
+        // This write will align the text section to a page boundary
         // and then return the offset at that point. This gives us the full size
         // of the text section at that point, after alignment.
-        let text_section_size = self.obj.append_section_data(self.text_section, &[], 0x1000);
+        let text_section_size =
+            self.obj
+                .append_section_data(self.text_section, &[], self.isa.code_section_alignment());
         for (text_section_off, unwind_info) in self.systemv_unwind_info.iter() {
             let backwards_off = text_section_size - text_section_off;
             let actual_offset = -i64::try_from(backwards_off).unwrap();
diff --git a/crates/fiber/src/arch/aarch64.S b/crates/fiber/src/arch/aarch64.S
index 37e9bc57fb..e2e201c977 100644
--- a/crates/fiber/src/arch/aarch64.S
+++ b/crates/fiber/src/arch/aarch64.S
@@ -86,6 +86,7 @@ FUNCTION(wasmtime_fiber_start):
         0x06,            /* DW_OP_deref */ \
         0x23, 0xa0, 0x1  /* DW_OP_plus_uconst 0xa0 */
 
+    .cfi_rel_offset x29, -0x08
     .cfi_rel_offset lr, -0x10
     .cfi_rel_offset x19, -0x18
     .cfi_rel_offset x20, -0x20
@@ -96,7 +97,6 @@ FUNCTION(wasmtime_fiber_start):
     .cfi_rel_offset x25, -0x48
     .cfi_rel_offset x26, -0x50
     .cfi_rel_offset x27, -0x58
-    .cfi_rel_offset x29, -0x60
 
     // Load our two arguments from the stack, where x1 is our start procedure
     // and x0 is its first argument. This also blows away the stack space used