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Add riscv64 backend to the README (#6085)

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Juan Bono
2023-03-21 23:29:19 -03:00
committed by GitHub
parent 7a3df7dcc0
commit 1ed7c89e3d
1 changed files with 2 additions and 2 deletions
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cranelift/README.md
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@@ -44,8 +44,8 @@ active effort to formally verify Cranelift's instruction-selection backends. We
take security seriously and have a [security policy] as a part of Bytecode take security seriously and have a [security policy] as a part of Bytecode
Alliance. Alliance.
Cranelift has three backends: x86-64, aarch64 (aka ARM64), and s390x (aka IBM Cranelift has four backends: x86-64, aarch64 (aka ARM64), s390x (aka IBM
Z). All three backends fully support enough functionality for Wasm MVP, and Z) and riscv64. All backends fully support enough functionality for Wasm MVP, and
x86-64 and aarch64 fully support SIMD as well. On x86-64, Cranelift supports x86-64 and aarch64 fully support SIMD as well. On x86-64, Cranelift supports
both the System V AMD64 ABI calling convention used on many platforms and the both the System V AMD64 ABI calling convention used on many platforms and the
Windows x64 calling convention. On aarch64, Cranelift supports the standard Windows x64 calling convention. On aarch64, Cranelift supports the standard