From 1ed7c89e3d07981bc821a8e12f531ddaa188a88c Mon Sep 17 00:00:00 2001 From: Juan Bono Date: Tue, 21 Mar 2023 23:29:19 -0300 Subject: [PATCH] Add riscv64 backend to the README (#6085) --- cranelift/README.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/cranelift/README.md b/cranelift/README.md index acdb579d04..3ca3337da5 100644 --- a/cranelift/README.md +++ b/cranelift/README.md @@ -44,8 +44,8 @@ active effort to formally verify Cranelift's instruction-selection backends. We take security seriously and have a [security policy] as a part of Bytecode Alliance. -Cranelift has three backends: x86-64, aarch64 (aka ARM64), and s390x (aka IBM -Z). All three backends fully support enough functionality for Wasm MVP, and +Cranelift has four backends: x86-64, aarch64 (aka ARM64), s390x (aka IBM +Z) and riscv64. All backends fully support enough functionality for Wasm MVP, and x86-64 and aarch64 fully support SIMD as well. On x86-64, Cranelift supports both the System V AMD64 ABI calling convention used on many platforms and the Windows x64 calling convention. On aarch64, Cranelift supports the standard