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Merge pull request #3115 from bjorn3/fminmax_pseudo_scalar

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Implement fmin_pseudo and fmax_pseudo for scalars
This commit is contained in:
Chris Fallin
2021-08-29 19:07:01 -07:00
committed by GitHub
parent 4ccdcb110a b79e59882d
commit 16854e73c5
4 changed files with 90 additions and 0 deletions
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4
cranelift/codegen/src/isa/x64/lower.rs
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@@ -4413,6 +4413,10 @@ fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
let ty = ty.unwrap();
ctx.emit(Inst::gen_move(dst, rhs, ty));
let sse_opcode = match (ty, op) {
(types::F32, Opcode::FminPseudo) => SseOpcode::Minss,
(types::F32, Opcode::FmaxPseudo) => SseOpcode::Maxss,
(types::F64, Opcode::FminPseudo) => SseOpcode::Minsd,
(types::F64, Opcode::FmaxPseudo) => SseOpcode::Maxsd,
(types::F32X4, Opcode::FminPseudo) => SseOpcode::Minps,
(types::F32X4, Opcode::FmaxPseudo) => SseOpcode::Maxps,
(types::F64X2, Opcode::FminPseudo) => SseOpcode::Minpd,

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cranelift/codegen/src/preopt.serialized
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36
cranelift/filetests/filetests/runtests/fmin-max-pseudo-vector.clif Normal file
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@@ -0,0 +1,36 @@
test run
; target s390x TODO: Not yet implemented on s390x
set enable_simd
target aarch64
target x86_64 machinst skylake
function %fmin_pseudo_f32x4(f32x4, f32x4) -> f32x4 {
block0(v0:f32x4, v1:f32x4):
v2 = fmin_pseudo v0, v1
return v2
}
; run: %fmin_pseudo_f32x4([0x1.0 NaN 0x0.1 -0x0.0], [0x2.0 0x2.0 NaN 0x0.0]) == [0x1.0 NaN 0x0.1 -0x0.0]
function %fmax_pseudo_f32x4(f32x4, f32x4) -> f32x4 {
block0(v0:f32x4, v1:f32x4):
v2 = fmax_pseudo v0, v1
return v2
}
; run: %fmax_pseudo_f32x4([0x1.0 NaN 0x0.1 -0x0.0], [0x2.0 0x2.0 NaN 0x0.0]) == [0x2.0 NaN 0x0.1 -0x0.0]
function %fmin_pseudo_f64x2(f64x2, f64x2) -> f64x2 {
block0(v0:f64x2, v1:f64x2):
v2 = fmin_pseudo v0, v1
return v2
}
; run: %fmin_pseudo_f64x2([0x1.0 NaN], [0x2.0 0x2.0]) == [0x1.0 NaN]
; run: %fmin_pseudo_f64x2([0x0.1 -0x0.0], [NaN 0x0.0]) == [0x0.1 -0x0.0]
function %fmax_pseudo_f64x2(f64x2, f64x2) -> f64x2 {
block0(v0:f64x2, v1:f64x2):
v2 = fmax_pseudo v0, v1
return v2
}
; run: %fmax_pseudo_f64x2([0x1.0 NaN], [0x2.0 0x2.0]) == [0x2.0 NaN]
; run: %fmax_pseudo_f64x2([0x0.1 -0x0.0], [NaN 0x0.0]) == [0x0.1 -0x0.0]

50
cranelift/filetests/filetests/runtests/fmin-max-pseudo.clif Normal file
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@@ -0,0 +1,50 @@
test run
; target s390x TODO: Not yet implemented on s390x
; target aarch64 TODO: Not yet implemented on aarch64
set enable_simd
target x86_64 machinst skylake
function %fmin_pseudo_f32(f32, f32) -> f32 {
block0(v0:f32, v1:f32):
v2 = fmin_pseudo v0, v1
return v2
}
; run: %fmin_pseudo_f32(0x1.0, 0x2.0) == 0x1.0
; run: %fmin_pseudo_f32(NaN, 0x2.0) == NaN
; run: %fmin_pseudo_f32(0x0.1, NaN) == 0x0.1
; run: %fmin_pseudo_f32(0x0.0, -0x0.0) == 0x0.0
; run: %fmin_pseudo_f32(-0x0.0, 0x0.0) == -0x0.0
function %fmax_pseudo_f32(f32, f32) -> f32 {
block0(v0:f32, v1:f32):
v2 = fmax_pseudo v0, v1
return v2
}
; run: %fmax_pseudo_f32(0x1.0, 0x2.0) == 0x2.0
; run: %fmax_pseudo_f32(NaN, 0x2.0) == NaN
; run: %fmax_pseudo_f32(0x0.1, NaN) == 0x0.1
; run: %fmax_pseudo_f32(0x0.0, 0x0.0) == 0x0.0
; run: %fmax_pseudo_f32(-0x0.0, 0x0.0) == -0x0.0
function %fmin_pseudo_f64(f64, f64) -> f64 {
block0(v0:f64, v1:f64):
v2 = fmin_pseudo v0, v1
return v2
}
; run: %fmin_pseudo_f64(0x1.0, 0x2.0) == 0x1.0
; run: %fmin_pseudo_f64(NaN, 0x2.0) == NaN
; run: %fmin_pseudo_f64(0x0.1, NaN) == 0x0.1
; run: %fmin_pseudo_f64(0x0.0, -0x0.0) == 0x0.0
; run: %fmin_pseudo_f64(-0x0.0, 0x0.0) == -0x0.0
function %fmax_pseudo_f64(f64, f64) -> f64 {
block0(v0:f64, v1:f64):
v2 = fmax_pseudo v0, v1
return v2
}
; run: %fmax_pseudo_f64(0x1.0, 0x2.0) == 0x2.0
; run: %fmax_pseudo_f64(NaN, 0x2.0) == NaN
; run: %fmax_pseudo_f64(0x0.1, NaN) == 0x0.1
; run: %fmax_pseudo_f64(0x0.0, 0x0.0) == 0x0.0
; run: %fmax_pseudo_f64(-0x0.0, 0x0.0) == -0x0.0