aarch64: Implement ireduce for i128 values

cranelift/codegen/src/isa/aarch64/lower_inst.rs

@@ -1726,7 +1726,7 @@ pub(crate) fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
         Opcode::Breduce | Opcode::Ireduce => {
             // Smaller integers/booleans are stored with high-order bits
             // undefined, so we can simply do a copy.
-            let rn = put_input_in_reg(ctx, inputs[0], NarrowValueMode::None);
+            let rn = put_input_in_regs(ctx, inputs[0]).regs()[0];
             let rd = get_output_reg(ctx, outputs[0]).only_reg().unwrap();
             let ty = ctx.input_ty(insn, 0);
             ctx.emit(Inst::gen_move(rd, rn, ty));