T0b1/wasmtime
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Remove all dsl legalizations for arm32, arm64 and s390x

Browse Source
This commit is contained in:
bjorn3
2021-06-20 18:42:19 +02:00
parent 50e53a0a73
commit 1415dd824a
3 changed files with 3 additions and 30 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
cranelift/codegen/meta/src/isa/arm32/mod.rs
View File

@@ -1,4 +1,3 @@
use crate::cdsl::cpu_modes::CpuMode;
use crate::cdsl::instructions::{InstructionGroupBuilder, InstructionPredicateMap}; use crate::cdsl::instructions::{InstructionGroupBuilder, InstructionPredicateMap};
use crate::cdsl::isa::TargetIsa; use crate::cdsl::isa::TargetIsa;
use crate::cdsl::recipes::Recipes; use crate::cdsl::recipes::Recipes;
@@ -55,20 +54,7 @@ pub(crate) fn define(shared_defs: &mut SharedDefinitions) -> TargetIsa {
let inst_group = InstructionGroupBuilder::new(&mut shared_defs.all_instructions).build(); let inst_group = InstructionGroupBuilder::new(&mut shared_defs.all_instructions).build();
// CPU modes for 32-bit ARM and Thumb2. let cpu_modes = vec![];
let mut a32 = CpuMode::new("A32");
let mut t32 = CpuMode::new("T32");
// TODO refine these.
let narrow_flags = shared_defs.transform_groups.by_name("narrow_flags");
a32.legalize_default(narrow_flags);
t32.legalize_default(narrow_flags);
// Make sure that the expand code is used, thus generated.
let expand = shared_defs.transform_groups.by_name("expand");
a32.legalize_monomorphic(expand);
let cpu_modes = vec![a32, t32];
// TODO implement arm32 recipes. // TODO implement arm32 recipes.
let recipes = Recipes::new(); let recipes = Recipes::new();

11
cranelift/codegen/meta/src/isa/arm64/mod.rs
View File

@@ -1,4 +1,3 @@
use crate::cdsl::cpu_modes::CpuMode;
use crate::cdsl::instructions::{InstructionGroupBuilder, InstructionPredicateMap}; use crate::cdsl::instructions::{InstructionGroupBuilder, InstructionPredicateMap};
use crate::cdsl::isa::TargetIsa; use crate::cdsl::isa::TargetIsa;
use crate::cdsl::recipes::Recipes; use crate::cdsl::recipes::Recipes;
@@ -54,15 +53,7 @@ pub(crate) fn define(shared_defs: &mut SharedDefinitions) -> TargetIsa {
let inst_group = InstructionGroupBuilder::new(&mut shared_defs.all_instructions).build(); let inst_group = InstructionGroupBuilder::new(&mut shared_defs.all_instructions).build();
let mut a64 = CpuMode::new("A64"); let cpu_modes = vec![];
// TODO refine these.
let expand_flags = shared_defs.transform_groups.by_name("expand_flags");
let narrow_flags = shared_defs.transform_groups.by_name("narrow_flags");
a64.legalize_monomorphic(expand_flags);
a64.legalize_default(narrow_flags);
let cpu_modes = vec![a64];
// TODO implement arm64 recipes. // TODO implement arm64 recipes.
let recipes = Recipes::new(); let recipes = Recipes::new();

6
cranelift/codegen/meta/src/isa/s390x/mod.rs
View File

@@ -1,4 +1,3 @@
use crate::cdsl::cpu_modes::CpuMode;
use crate::cdsl::instructions::{InstructionGroupBuilder, InstructionPredicateMap}; use crate::cdsl::instructions::{InstructionGroupBuilder, InstructionPredicateMap};
use crate::cdsl::isa::TargetIsa; use crate::cdsl::isa::TargetIsa;
use crate::cdsl::recipes::Recipes; use crate::cdsl::recipes::Recipes;
@@ -51,10 +50,7 @@ pub(crate) fn define(shared_defs: &mut SharedDefinitions) -> TargetIsa {
let recipes = Recipes::new(); let recipes = Recipes::new();
let encodings_predicates = InstructionPredicateMap::new(); let encodings_predicates = InstructionPredicateMap::new();
let mut mode = CpuMode::new("s390x"); let cpu_modes = vec![];
let expand = shared_defs.transform_groups.by_name("expand");
mode.legalize_default(expand);
let cpu_modes = vec![mode];
TargetIsa::new( TargetIsa::new(
"s390x", "s390x",