diff --git a/cranelift/codegen/meta/src/isa/arm32/mod.rs b/cranelift/codegen/meta/src/isa/arm32/mod.rs
index f699ece8eb..84d93afadc 100644
--- a/cranelift/codegen/meta/src/isa/arm32/mod.rs
+++ b/cranelift/codegen/meta/src/isa/arm32/mod.rs
@@ -1,4 +1,3 @@
-use crate::cdsl::cpu_modes::CpuMode;
 use crate::cdsl::instructions::{InstructionGroupBuilder, InstructionPredicateMap};
 use crate::cdsl::isa::TargetIsa;
 use crate::cdsl::recipes::Recipes;
@@ -55,20 +54,7 @@ pub(crate) fn define(shared_defs: &mut SharedDefinitions) -> TargetIsa {
 
     let inst_group = InstructionGroupBuilder::new(&mut shared_defs.all_instructions).build();
 
-    // CPU modes for 32-bit ARM and Thumb2.
-    let mut a32 = CpuMode::new("A32");
-    let mut t32 = CpuMode::new("T32");
-
-    // TODO refine these.
-    let narrow_flags = shared_defs.transform_groups.by_name("narrow_flags");
-    a32.legalize_default(narrow_flags);
-    t32.legalize_default(narrow_flags);
-
-    // Make sure that the expand code is used, thus generated.
-    let expand = shared_defs.transform_groups.by_name("expand");
-    a32.legalize_monomorphic(expand);
-
-    let cpu_modes = vec![a32, t32];
+    let cpu_modes = vec![];
 
     // TODO implement arm32 recipes.
     let recipes = Recipes::new();
diff --git a/cranelift/codegen/meta/src/isa/arm64/mod.rs b/cranelift/codegen/meta/src/isa/arm64/mod.rs
index 4277e147a7..2ad618d3cd 100644
--- a/cranelift/codegen/meta/src/isa/arm64/mod.rs
+++ b/cranelift/codegen/meta/src/isa/arm64/mod.rs
@@ -1,4 +1,3 @@
-use crate::cdsl::cpu_modes::CpuMode;
 use crate::cdsl::instructions::{InstructionGroupBuilder, InstructionPredicateMap};
 use crate::cdsl::isa::TargetIsa;
 use crate::cdsl::recipes::Recipes;
@@ -54,15 +53,7 @@ pub(crate) fn define(shared_defs: &mut SharedDefinitions) -> TargetIsa {
 
     let inst_group = InstructionGroupBuilder::new(&mut shared_defs.all_instructions).build();
 
-    let mut a64 = CpuMode::new("A64");
-
-    // TODO refine these.
-    let expand_flags = shared_defs.transform_groups.by_name("expand_flags");
-    let narrow_flags = shared_defs.transform_groups.by_name("narrow_flags");
-    a64.legalize_monomorphic(expand_flags);
-    a64.legalize_default(narrow_flags);
-
-    let cpu_modes = vec![a64];
+    let cpu_modes = vec![];
 
     // TODO implement arm64 recipes.
     let recipes = Recipes::new();
diff --git a/cranelift/codegen/meta/src/isa/s390x/mod.rs b/cranelift/codegen/meta/src/isa/s390x/mod.rs
index b0837dc22d..20796804b0 100644
--- a/cranelift/codegen/meta/src/isa/s390x/mod.rs
+++ b/cranelift/codegen/meta/src/isa/s390x/mod.rs
@@ -1,4 +1,3 @@
-use crate::cdsl::cpu_modes::CpuMode;
 use crate::cdsl::instructions::{InstructionGroupBuilder, InstructionPredicateMap};
 use crate::cdsl::isa::TargetIsa;
 use crate::cdsl::recipes::Recipes;
@@ -51,10 +50,7 @@ pub(crate) fn define(shared_defs: &mut SharedDefinitions) -> TargetIsa {
     let recipes = Recipes::new();
     let encodings_predicates = InstructionPredicateMap::new();
 
-    let mut mode = CpuMode::new("s390x");
-    let expand = shared_defs.transform_groups.by_name("expand");
-    mode.legalize_default(expand);
-    let cpu_modes = vec![mode];
+    let cpu_modes = vec![];
 
     TargetIsa::new(
         "s390x",