aarch64: Use VCodeConstant for f64/v128 constants (#5997)

* aarch64: Translate float and splat lowering to ISLE

I was looking into `constant_f128` and its fallback lowering into memory
and to get familiar with the code I figured it'd be good to port some
Rust logic to ISLE. This commit ports the `constant_{f128,f64,f32}`
helpers into ISLE from Rust as well as the `splat_const` helper which
ended up being closely related.

Tests reflect a number of regalloc changes that happened but also namely
one major difference is that in the lowering of `f32` a 32-bit immediate
is created now instead of a 64-bit immediate (in a GP register before
it's moved into a FP register). This semantically has no change but the
generated code is slightly different in a few minor cases.

* aarch64: Load f64/v128 constants from a pool

This commit removes the `LoadFpuConst64` and `LoadFpuConst128`
pseudo-instructions from the AArch64 backend which internally loaded a
nearby constant and then jumped over it. Constants now go through the
`VCodeConstant` infrastructure which gets placed at the end of the
function similar to how x64 works. Some minor support was added in as
well to add a new addressing mode for a `MachLabel`-relative load.

cranelift/filetests/filetests/isa/aarch64/constants.clif

@@ -356,14 +356,14 @@ block0:
 
 ; VCode:
 ; block0:
-;   movz x1, #16457, LSL #48
-;   fmov d0, x1
+;   movz x0, #16457, LSL #48
+;   fmov d0, x0
 ;   ret
 ; 
 ; Disassembled:
 ; block0: ; offset 0x0
-;   mov x1, #0x4049000000000000
-;   fmov d0, x1
+;   mov x0, #0x4049000000000000
+;   fmov d0, x0
 ;   ret
 
 function %f() -> f32 {
@@ -374,14 +374,14 @@ block0:
 
 ; VCode:
 ; block0:
-;   movz x1, #16968, LSL #16
-;   fmov s0, w1
+;   movz w0, #16968, LSL #16
+;   fmov s0, w0
 ;   ret
 ; 
 ; Disassembled:
 ; block0: ; offset 0x0
-;   mov x1, #0x42480000
-;   fmov s0, w1
+;   mov w0, #0x42480000
+;   fmov s0, w0
 ;   ret
 
 function %f() -> f64 {

cranelift/filetests/filetests/isa/aarch64/fcvt-small.clif

@@ -87,9 +87,9 @@ block0(v0: f32):
 ;   fmov s4, #-1
 ;   fcmp s0, s4
 ;   b.gt 8 ; udf
-;   movz x9, #17280, LSL #16
-;   fmov s17, w9
-;   fcmp s0, s17
+;   movz w8, #17280, LSL #16
+;   fmov s18, w8
+;   fcmp s0, s18
 ;   b.lt 8 ; udf
 ;   fcvtzu w0, s0
 ;   ret
@@ -103,9 +103,9 @@ block0(v0: f32):
 ;   fcmp s0, s4
 ;   b.gt #0x1c
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
-;   mov x9, #0x43800000
-;   fmov s17, w9
-;   fcmp s0, s17
+;   mov w8, #0x43800000
+;   fmov s18, w8
+;   fcmp s0, s18
 ;   b.lt #0x30
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
 ;   fcvtzu w0, s0
@@ -124,9 +124,9 @@ block0(v0: f64):
 ;   fmov d4, #-1
 ;   fcmp d0, d4
 ;   b.gt 8 ; udf
-;   movz x9, #16496, LSL #48
-;   fmov d17, x9
-;   fcmp d0, d17
+;   movz x8, #16496, LSL #48
+;   fmov d18, x8
+;   fcmp d0, d18
 ;   b.lt 8 ; udf
 ;   fcvtzu w0, d0
 ;   ret
@@ -140,9 +140,9 @@ block0(v0: f64):
 ;   fcmp d0, d4
 ;   b.gt #0x1c
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
-;   mov x9, #0x4070000000000000
-;   fmov d17, x9
-;   fcmp d0, d17
+;   mov x8, #0x4070000000000000
+;   fmov d18, x8
+;   fcmp d0, d18
 ;   b.lt #0x30
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
 ;   fcvtzu w0, d0
@@ -161,9 +161,9 @@ block0(v0: f32):
 ;   fmov s4, #-1
 ;   fcmp s0, s4
 ;   b.gt 8 ; udf
-;   movz x9, #18304, LSL #16
-;   fmov s17, w9
-;   fcmp s0, s17
+;   movz w8, #18304, LSL #16
+;   fmov s18, w8
+;   fcmp s0, s18
 ;   b.lt 8 ; udf
 ;   fcvtzu w0, s0
 ;   ret
@@ -177,9 +177,9 @@ block0(v0: f32):
 ;   fcmp s0, s4
 ;   b.gt #0x1c
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
-;   mov x9, #0x47800000
-;   fmov s17, w9
-;   fcmp s0, s17
+;   mov w8, #0x47800000
+;   fmov s18, w8
+;   fcmp s0, s18
 ;   b.lt #0x30
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
 ;   fcvtzu w0, s0
@@ -198,9 +198,9 @@ block0(v0: f64):
 ;   fmov d4, #-1
 ;   fcmp d0, d4
 ;   b.gt 8 ; udf
-;   movz x9, #16624, LSL #48
-;   fmov d17, x9
-;   fcmp d0, d17
+;   movz x8, #16624, LSL #48
+;   fmov d18, x8
+;   fcmp d0, d18
 ;   b.lt 8 ; udf
 ;   fcvtzu w0, d0
 ;   ret
@@ -214,9 +214,9 @@ block0(v0: f64):
 ;   fcmp d0, d4
 ;   b.gt #0x1c
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
-;   mov x9, #0x40f0000000000000
-;   fmov d17, x9
-;   fcmp d0, d17
+;   mov x8, #0x40f0000000000000
+;   fmov d18, x8
+;   fcmp d0, d18
 ;   b.lt #0x30
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
 ;   fcvtzu w0, d0

cranelift/filetests/filetests/isa/aarch64/fcvt.clif

@@ -241,9 +241,9 @@ block0(v0: f32):
 ;   fmov s4, #-1
 ;   fcmp s0, s4
 ;   b.gt 8 ; udf
-;   movz x9, #20352, LSL #16
-;   fmov s17, w9
-;   fcmp s0, s17
+;   movz w8, #20352, LSL #16
+;   fmov s18, w8
+;   fcmp s0, s18
 ;   b.lt 8 ; udf
 ;   fcvtzu w0, s0
 ;   ret
@@ -257,9 +257,9 @@ block0(v0: f32):
 ;   fcmp s0, s4
 ;   b.gt #0x1c
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
-;   mov x9, #0x4f800000
-;   fmov s17, w9
-;   fcmp s0, s17
+;   mov w8, #0x4f800000
+;   fmov s18, w8
+;   fcmp s0, s18
 ;   b.lt #0x30
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
 ;   fcvtzu w0, s0
@@ -278,9 +278,9 @@ block0(v0: f32):
 ;   fmov s4, #-1
 ;   fcmp s0, s4
 ;   b.gt 8 ; udf
-;   movz x9, #24448, LSL #16
-;   fmov s17, w9
-;   fcmp s0, s17
+;   movz w8, #24448, LSL #16
+;   fmov s18, w8
+;   fcmp s0, s18
 ;   b.lt 8 ; udf
 ;   fcvtzu x0, s0
 ;   ret
@@ -294,9 +294,9 @@ block0(v0: f32):
 ;   fcmp s0, s4
 ;   b.gt #0x1c
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
-;   mov x9, #0x5f800000
-;   fmov s17, w9
-;   fcmp s0, s17
+;   mov w8, #0x5f800000
+;   fmov s18, w8
+;   fcmp s0, s18
 ;   b.lt #0x30
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
 ;   fcvtzu x0, s0
@@ -315,9 +315,9 @@ block0(v0: f64):
 ;   fmov d4, #-1
 ;   fcmp d0, d4
 ;   b.gt 8 ; udf
-;   movz x9, #16880, LSL #48
-;   fmov d17, x9
-;   fcmp d0, d17
+;   movz x8, #16880, LSL #48
+;   fmov d18, x8
+;   fcmp d0, d18
 ;   b.lt 8 ; udf
 ;   fcvtzu w0, d0
 ;   ret
@@ -331,9 +331,9 @@ block0(v0: f64):
 ;   fcmp d0, d4
 ;   b.gt #0x1c
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
-;   mov x9, #0x41f0000000000000
-;   fmov d17, x9
-;   fcmp d0, d17
+;   mov x8, #0x41f0000000000000
+;   fmov d18, x8
+;   fcmp d0, d18
 ;   b.lt #0x30
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
 ;   fcvtzu w0, d0
@@ -352,9 +352,9 @@ block0(v0: f64):
 ;   fmov d4, #-1
 ;   fcmp d0, d4
 ;   b.gt 8 ; udf
-;   movz x9, #17392, LSL #48
-;   fmov d17, x9
-;   fcmp d0, d17
+;   movz x8, #17392, LSL #48
+;   fmov d18, x8
+;   fcmp d0, d18
 ;   b.lt 8 ; udf
 ;   fcvtzu x0, d0
 ;   ret
@@ -368,9 +368,9 @@ block0(v0: f64):
 ;   fcmp d0, d4
 ;   b.gt #0x1c
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
-;   mov x9, #0x43f0000000000000
-;   fmov d17, x9
-;   fcmp d0, d17
+;   mov x8, #0x43f0000000000000
+;   fmov d18, x8
+;   fcmp d0, d18
 ;   b.lt #0x30
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
 ;   fcvtzu x0, d0
@@ -450,13 +450,13 @@ block0(v0: f32):
 ; block0:
 ;   fcmp s0, s0
 ;   b.vc 8 ; udf
-;   movz x5, #52992, LSL #16
-;   fmov s5, w5
-;   fcmp s0, s5
+;   movz w4, #52992, LSL #16
+;   fmov s6, w4
+;   fcmp s0, s6
 ;   b.ge 8 ; udf
-;   movz x11, #20224, LSL #16
-;   fmov s19, w11
-;   fcmp s0, s19
+;   movz w10, #20224, LSL #16
+;   fmov s20, w10
+;   fcmp s0, s20
 ;   b.lt 8 ; udf
 ;   fcvtzs w0, s0
 ;   ret
@@ -466,14 +466,14 @@ block0(v0: f32):
 ;   fcmp s0, s0
 ;   b.vc #0xc
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: bad_toint
-;   mov x5, #0xcf000000
-;   fmov s5, w5
-;   fcmp s0, s5
+;   mov w4, #-0x31000000
+;   fmov s6, w4
+;   fcmp s0, s6
 ;   b.ge #0x20
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
-;   mov x11, #0x4f000000
-;   fmov s19, w11
-;   fcmp s0, s19
+;   mov w10, #0x4f000000
+;   fmov s20, w10
+;   fcmp s0, s20
 ;   b.lt #0x34
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
 ;   fcvtzs w0, s0
@@ -489,13 +489,13 @@ block0(v0: f32):
 ; block0:
 ;   fcmp s0, s0
 ;   b.vc 8 ; udf
-;   movz x5, #57088, LSL #16
-;   fmov s5, w5
-;   fcmp s0, s5
+;   movz w4, #57088, LSL #16
+;   fmov s6, w4
+;   fcmp s0, s6
 ;   b.ge 8 ; udf
-;   movz x11, #24320, LSL #16
-;   fmov s19, w11
-;   fcmp s0, s19
+;   movz w10, #24320, LSL #16
+;   fmov s20, w10
+;   fcmp s0, s20
 ;   b.lt 8 ; udf
 ;   fcvtzs x0, s0
 ;   ret
@@ -505,14 +505,14 @@ block0(v0: f32):
 ;   fcmp s0, s0
 ;   b.vc #0xc
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: bad_toint
-;   mov x5, #0xdf000000
-;   fmov s5, w5
-;   fcmp s0, s5
+;   mov w4, #-0x21000000
+;   fmov s6, w4
+;   fcmp s0, s6
 ;   b.ge #0x20
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
-;   mov x11, #0x5f000000
-;   fmov s19, w11
-;   fcmp s0, s19
+;   mov w10, #0x5f000000
+;   fmov s20, w10
+;   fcmp s0, s20
 ;   b.lt #0x34
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
 ;   fcvtzs x0, s0
@@ -528,12 +528,12 @@ block0(v0: f64):
 ; block0:
 ;   fcmp d0, d0
 ;   b.vc 8 ; udf
-;   ldr d4, pc+8 ; b 12 ; data.f64 -2147483649
+;   ldr d4, [const(0)]
 ;   fcmp d0, d4
 ;   b.gt 8 ; udf
-;   movz x9, #16864, LSL #48
-;   fmov d17, x9
-;   fcmp d0, d17
+;   movz x8, #16864, LSL #48
+;   fmov d18, x8
+;   fcmp d0, d18
 ;   b.lt 8 ; udf
 ;   fcvtzs w0, d0
 ;   ret
@@ -543,20 +543,19 @@ block0(v0: f64):
 ;   fcmp d0, d0
 ;   b.vc #0xc
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: bad_toint
-;   ldr d4, #0x14
-;   b #0x1c
-;   .byte 0x00, 0x00, 0x20, 0x00
-;   .byte 0x00, 0x00, 0xe0, 0xc1
+;   ldr d4, #0x38
 ;   fcmp d0, d4
-;   b.gt #0x28
+;   b.gt #0x1c
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
-;   mov x9, #0x41e0000000000000
-;   fmov d17, x9
-;   fcmp d0, d17
-;   b.lt #0x3c
+;   mov x8, #0x41e0000000000000
+;   fmov d18, x8
+;   fcmp d0, d18
+;   b.lt #0x30
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
 ;   fcvtzs w0, d0
 ;   ret
+;   .byte 0x00, 0x00, 0x20, 0x00
+;   .byte 0x00, 0x00, 0xe0, 0xc1
 
 function %f24(f64) -> i64 {
 block0(v0: f64):
@@ -568,13 +567,13 @@ block0(v0: f64):
 ; block0:
 ;   fcmp d0, d0
 ;   b.vc 8 ; udf
-;   movz x5, #50144, LSL #48
-;   fmov d5, x5
-;   fcmp d0, d5
+;   movz x4, #50144, LSL #48
+;   fmov d6, x4
+;   fcmp d0, d6
 ;   b.ge 8 ; udf
-;   movz x11, #17376, LSL #48
-;   fmov d19, x11
-;   fcmp d0, d19
+;   movz x10, #17376, LSL #48
+;   fmov d20, x10
+;   fcmp d0, d20
 ;   b.lt 8 ; udf
 ;   fcvtzs x0, d0
 ;   ret
@@ -584,14 +583,14 @@ block0(v0: f64):
 ;   fcmp d0, d0
 ;   b.vc #0xc
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: bad_toint
-;   mov x5, #-0x3c20000000000000
-;   fmov d5, x5
-;   fcmp d0, d5
+;   mov x4, #-0x3c20000000000000
+;   fmov d6, x4
+;   fcmp d0, d6
 ;   b.ge #0x20
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
-;   mov x11, #0x43e0000000000000
-;   fmov d19, x11
-;   fcmp d0, d19
+;   mov x10, #0x43e0000000000000
+;   fmov d20, x10
+;   fcmp d0, d20
 ;   b.lt #0x34
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
 ;   fcvtzs x0, d0

cranelift/filetests/filetests/isa/aarch64/floating-point.clif

@@ -531,9 +531,9 @@ block0(v0: f32):
 ;   fmov s4, #-1
 ;   fcmp s0, s4
 ;   b.gt 8 ; udf
-;   movz x9, #20352, LSL #16
-;   fmov s17, w9
-;   fcmp s0, s17
+;   movz w8, #20352, LSL #16
+;   fmov s18, w8
+;   fcmp s0, s18
 ;   b.lt 8 ; udf
 ;   fcvtzu w0, s0
 ;   ret
@@ -547,9 +547,9 @@ block0(v0: f32):
 ;   fcmp s0, s4
 ;   b.gt #0x1c
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
-;   mov x9, #0x4f800000
-;   fmov s17, w9
-;   fcmp s0, s17
+;   mov w8, #0x4f800000
+;   fmov s18, w8
+;   fcmp s0, s18
 ;   b.lt #0x30
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
 ;   fcvtzu w0, s0
@@ -565,13 +565,13 @@ block0(v0: f32):
 ; block0:
 ;   fcmp s0, s0
 ;   b.vc 8 ; udf
-;   movz x5, #52992, LSL #16
-;   fmov s5, w5
-;   fcmp s0, s5
+;   movz w4, #52992, LSL #16
+;   fmov s6, w4
+;   fcmp s0, s6
 ;   b.ge 8 ; udf
-;   movz x11, #20224, LSL #16
-;   fmov s19, w11
-;   fcmp s0, s19
+;   movz w10, #20224, LSL #16
+;   fmov s20, w10
+;   fcmp s0, s20
 ;   b.lt 8 ; udf
 ;   fcvtzs w0, s0
 ;   ret
@@ -581,14 +581,14 @@ block0(v0: f32):
 ;   fcmp s0, s0
 ;   b.vc #0xc
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: bad_toint
-;   mov x5, #0xcf000000
-;   fmov s5, w5
-;   fcmp s0, s5
+;   mov w4, #-0x31000000
+;   fmov s6, w4
+;   fcmp s0, s6
 ;   b.ge #0x20
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
-;   mov x11, #0x4f000000
-;   fmov s19, w11
-;   fcmp s0, s19
+;   mov w10, #0x4f000000
+;   fmov s20, w10
+;   fcmp s0, s20
 ;   b.lt #0x34
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
 ;   fcvtzs w0, s0
@@ -607,9 +607,9 @@ block0(v0: f32):
 ;   fmov s4, #-1
 ;   fcmp s0, s4
 ;   b.gt 8 ; udf
-;   movz x9, #24448, LSL #16
-;   fmov s17, w9
-;   fcmp s0, s17
+;   movz w8, #24448, LSL #16
+;   fmov s18, w8
+;   fcmp s0, s18
 ;   b.lt 8 ; udf
 ;   fcvtzu x0, s0
 ;   ret
@@ -623,9 +623,9 @@ block0(v0: f32):
 ;   fcmp s0, s4
 ;   b.gt #0x1c
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
-;   mov x9, #0x5f800000
-;   fmov s17, w9
-;   fcmp s0, s17
+;   mov w8, #0x5f800000
+;   fmov s18, w8
+;   fcmp s0, s18
 ;   b.lt #0x30
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
 ;   fcvtzu x0, s0
@@ -641,13 +641,13 @@ block0(v0: f32):
 ; block0:
 ;   fcmp s0, s0
 ;   b.vc 8 ; udf
-;   movz x5, #57088, LSL #16
-;   fmov s5, w5
-;   fcmp s0, s5
+;   movz w4, #57088, LSL #16
+;   fmov s6, w4
+;   fcmp s0, s6
 ;   b.ge 8 ; udf
-;   movz x11, #24320, LSL #16
-;   fmov s19, w11
-;   fcmp s0, s19
+;   movz w10, #24320, LSL #16
+;   fmov s20, w10
+;   fcmp s0, s20
 ;   b.lt 8 ; udf
 ;   fcvtzs x0, s0
 ;   ret
@@ -657,14 +657,14 @@ block0(v0: f32):
 ;   fcmp s0, s0
 ;   b.vc #0xc
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: bad_toint
-;   mov x5, #0xdf000000
-;   fmov s5, w5
-;   fcmp s0, s5
+;   mov w4, #-0x21000000
+;   fmov s6, w4
+;   fcmp s0, s6
 ;   b.ge #0x20
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
-;   mov x11, #0x5f000000
-;   fmov s19, w11
-;   fcmp s0, s19
+;   mov w10, #0x5f000000
+;   fmov s20, w10
+;   fcmp s0, s20
 ;   b.lt #0x34
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
 ;   fcvtzs x0, s0
@@ -683,9 +683,9 @@ block0(v0: f64):
 ;   fmov d4, #-1
 ;   fcmp d0, d4
 ;   b.gt 8 ; udf
-;   movz x9, #16880, LSL #48
-;   fmov d17, x9
-;   fcmp d0, d17
+;   movz x8, #16880, LSL #48
+;   fmov d18, x8
+;   fcmp d0, d18
 ;   b.lt 8 ; udf
 ;   fcvtzu w0, d0
 ;   ret
@@ -699,9 +699,9 @@ block0(v0: f64):
 ;   fcmp d0, d4
 ;   b.gt #0x1c
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
-;   mov x9, #0x41f0000000000000
-;   fmov d17, x9
-;   fcmp d0, d17
+;   mov x8, #0x41f0000000000000
+;   fmov d18, x8
+;   fcmp d0, d18
 ;   b.lt #0x30
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
 ;   fcvtzu w0, d0
@@ -717,12 +717,12 @@ block0(v0: f64):
 ; block0:
 ;   fcmp d0, d0
 ;   b.vc 8 ; udf
-;   ldr d4, pc+8 ; b 12 ; data.f64 -2147483649
+;   ldr d4, [const(0)]
 ;   fcmp d0, d4
 ;   b.gt 8 ; udf
-;   movz x9, #16864, LSL #48
-;   fmov d17, x9
-;   fcmp d0, d17
+;   movz x8, #16864, LSL #48
+;   fmov d18, x8
+;   fcmp d0, d18
 ;   b.lt 8 ; udf
 ;   fcvtzs w0, d0
 ;   ret
@@ -732,20 +732,19 @@ block0(v0: f64):
 ;   fcmp d0, d0
 ;   b.vc #0xc
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: bad_toint
-;   ldr d4, #0x14
-;   b #0x1c
-;   .byte 0x00, 0x00, 0x20, 0x00
-;   .byte 0x00, 0x00, 0xe0, 0xc1
+;   ldr d4, #0x38
 ;   fcmp d0, d4
-;   b.gt #0x28
+;   b.gt #0x1c
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
-;   mov x9, #0x41e0000000000000
-;   fmov d17, x9
-;   fcmp d0, d17
-;   b.lt #0x3c
+;   mov x8, #0x41e0000000000000
+;   fmov d18, x8
+;   fcmp d0, d18
+;   b.lt #0x30
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
 ;   fcvtzs w0, d0
 ;   ret
+;   .byte 0x00, 0x00, 0x20, 0x00
+;   .byte 0x00, 0x00, 0xe0, 0xc1
 
 function %f39(f64) -> i64 {
 block0(v0: f64):
@@ -760,9 +759,9 @@ block0(v0: f64):
 ;   fmov d4, #-1
 ;   fcmp d0, d4
 ;   b.gt 8 ; udf
-;   movz x9, #17392, LSL #48
-;   fmov d17, x9
-;   fcmp d0, d17
+;   movz x8, #17392, LSL #48
+;   fmov d18, x8
+;   fcmp d0, d18
 ;   b.lt 8 ; udf
 ;   fcvtzu x0, d0
 ;   ret
@@ -776,9 +775,9 @@ block0(v0: f64):
 ;   fcmp d0, d4
 ;   b.gt #0x1c
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
-;   mov x9, #0x43f0000000000000
-;   fmov d17, x9
-;   fcmp d0, d17
+;   mov x8, #0x43f0000000000000
+;   fmov d18, x8
+;   fcmp d0, d18
 ;   b.lt #0x30
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
 ;   fcvtzu x0, d0
@@ -794,13 +793,13 @@ block0(v0: f64):
 ; block0:
 ;   fcmp d0, d0
 ;   b.vc 8 ; udf
-;   movz x5, #50144, LSL #48
-;   fmov d5, x5
-;   fcmp d0, d5
+;   movz x4, #50144, LSL #48
+;   fmov d6, x4
+;   fcmp d0, d6
 ;   b.ge 8 ; udf
-;   movz x11, #17376, LSL #48
-;   fmov d19, x11
-;   fcmp d0, d19
+;   movz x10, #17376, LSL #48
+;   fmov d20, x10
+;   fcmp d0, d20
 ;   b.lt 8 ; udf
 ;   fcvtzs x0, d0
 ;   ret
@@ -810,14 +809,14 @@ block0(v0: f64):
 ;   fcmp d0, d0
 ;   b.vc #0xc
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: bad_toint
-;   mov x5, #-0x3c20000000000000
-;   fmov d5, x5
-;   fcmp d0, d5
+;   mov x4, #-0x3c20000000000000
+;   fmov d6, x4
+;   fcmp d0, d6
 ;   b.ge #0x20
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
-;   mov x11, #0x43e0000000000000
-;   fmov d19, x11
-;   fcmp d0, d19
+;   mov x10, #0x43e0000000000000
+;   fmov d20, x10
+;   fcmp d0, d20
 ;   b.lt #0x34
 ;   .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: int_ovf
 ;   fcvtzs x0, d0

cranelift/filetests/filetests/isa/aarch64/shuffle.clif

@@ -12,7 +12,7 @@ block0(v0: i8x16, v1: i8x16):
 ; block0:
 ;   mov v30.16b, v0.16b
 ;   mov v31.16b, v1.16b
-;   ldr q3, pc+8 ; b 20 ; data.f128 0x05110f0204180d170b0c06041a1f0003
+;   ldr q3, [const(0)]
 ;   tbl v0.16b, { v30.16b, v31.16b }, v3.16b
 ;   ret
 ; 
@@ -20,14 +20,16 @@ block0(v0: i8x16, v1: i8x16):
 ; block0: ; offset 0x0
 ;   mov v30.16b, v0.16b
 ;   mov v31.16b, v1.16b
-;   ldr q3, #0x10
-;   b #0x20
+;   ldr q3, #0x20
+;   tbl v0.16b, {v30.16b, v31.16b}, v3.16b
+;   ret
+;   .byte 0x00, 0x00, 0x00, 0x00
+;   .byte 0x00, 0x00, 0x00, 0x00
+;   .byte 0x00, 0x00, 0x00, 0x00
 ;   adc w3, w0, wzr
 ;   add w4, w16, w12, lsl #1
 ;   orr z23.b, p3/m, z23.b, z8.b
 ;   mov z2.b, p1/z, #0x78
-;   tbl v0.16b, {v30.16b, v31.16b}, v3.16b
-;   ret
 
 function %aarch64_uzp1_i8x16(i8x16, i8x16) -> i8x16 {
 block0(v0: i8x16, v1: i8x16):
@@ -541,7 +543,7 @@ block0(v0: i8x16, v1: i8x16):
 ; block0:
 ;   mov v30.16b, v0.16b
 ;   mov v31.16b, v1.16b
-;   ldr q3, pc+8 ; b 20 ; data.f128 0x1f1e1d1c1b1a19181716151413121110
+;   ldr q3, [const(0)]
 ;   tbl v0.16b, { v30.16b, v31.16b }, v3.16b
 ;   ret
 ; 
@@ -549,14 +551,16 @@ block0(v0: i8x16, v1: i8x16):
 ; block0: ; offset 0x0
 ;   mov v30.16b, v0.16b
 ;   mov v31.16b, v1.16b
-;   ldr q3, #0x10
-;   b #0x20
-;   sbfiz w16, w8, #0xe, #5
-;   b #0xfffffffffc585464
-;   madd w24, w8, w26, w6
-;   fmadd s28, s8, s30, s7
+;   ldr q3, #0x20
 ;   tbl v0.16b, {v30.16b, v31.16b}, v3.16b
 ;   ret
+;   .byte 0x00, 0x00, 0x00, 0x00
+;   .byte 0x00, 0x00, 0x00, 0x00
+;   .byte 0x00, 0x00, 0x00, 0x00
+;   sbfiz w16, w8, #0xe, #5
+;   b #0xfffffffffc585474
+;   madd w24, w8, w26, w6
+;   fmadd s28, s8, s30, s7
 
 function %aarch64_dup_i8x16(i8x16, i8x16) -> i8x16 {
 block0(v0: i8x16, v1: i8x16):

cranelift/filetests/filetests/isa/aarch64/simd-arithmetic.clif

@@ -106,10 +106,10 @@ block0(v0: i64x2, v1: i64x2):
 
 ; VCode:
 ; block0:
-;   movz x4, #1
-;   dup v4.2d, x4
+;   movz x3, #1
+;   dup v5.2d, x3
 ;   orr v7.16b, v0.16b, v1.16b
-;   and v17.16b, v7.16b, v4.16b
+;   and v17.16b, v7.16b, v5.16b
 ;   ushr v19.2d, v0.2d, #1
 ;   ushr v21.2d, v1.2d, #1
 ;   add v23.2d, v19.2d, v21.2d
@@ -118,10 +118,10 @@ block0(v0: i64x2, v1: i64x2):
 ; 
 ; Disassembled:
 ; block0: ; offset 0x0
-;   mov x4, #1
-;   dup v4.2d, x4
+;   mov x3, #1
+;   dup v5.2d, x3
 ;   orr v7.16b, v0.16b, v1.16b
-;   and v17.16b, v7.16b, v4.16b
+;   and v17.16b, v7.16b, v5.16b
 ;   ushr v19.2d, v0.2d, #1
 ;   ushr v21.2d, v1.2d, #1
 ;   add v23.2d, v19.2d, v21.2d

cranelift/filetests/filetests/isa/aarch64/simd-bitwise-compile.clif

@@ -228,7 +228,7 @@ block0(v0: i32):
 
 ; VCode:
 ; block0:
-;   ldr q5, pc+8 ; b 20 ; data.f128 0x0f0e0d0c0b0a09080706050403020100
+;   ldr q5, [const(0)]
 ;   and w3, w0, #7
 ;   dup v6.16b, w3
 ;   sshl v0.16b, v5.16b, v6.16b
@@ -236,16 +236,18 @@ block0(v0: i32):
 ; 
 ; Disassembled:
 ; block0: ; offset 0x0
-;   ldr q5, #8
-;   b #0x18
-;   .byte 0x00, 0x01, 0x02, 0x03
-;   .byte 0x04, 0x05, 0x06, 0x07
-;   add w8, w8, w10, lsl #2
-;   .byte 0x0c, 0x0d, 0x0e, 0x0f
+;   ldr q5, #0x20
 ;   and w3, w0, #7
 ;   dup v6.16b, w3
 ;   sshl v0.16b, v5.16b, v6.16b
 ;   ret
+;   .byte 0x00, 0x00, 0x00, 0x00
+;   .byte 0x00, 0x00, 0x00, 0x00
+;   .byte 0x00, 0x00, 0x00, 0x00
+;   .byte 0x00, 0x01, 0x02, 0x03
+;   .byte 0x04, 0x05, 0x06, 0x07
+;   add w8, w8, w10, lsl #2
+;   .byte 0x0c, 0x0d, 0x0e, 0x0f
 
 function %ushr_i8x16_imm() -> i8x16 {
 block0:
@@ -257,7 +259,7 @@ block0:
 
 ; VCode:
 ; block0:
-;   ldr q5, pc+8 ; b 20 ; data.f128 0x0f0e0d0c0b0a09080706050403020100
+;   ldr q5, [const(0)]
 ;   movz w1, #1
 ;   and w3, w1, #7
 ;   sub x5, xzr, x3
@@ -267,18 +269,18 @@ block0:
 ; 
 ; Disassembled:
 ; block0: ; offset 0x0
-;   ldr q5, #8
-;   b #0x18
-;   .byte 0x00, 0x01, 0x02, 0x03
-;   .byte 0x04, 0x05, 0x06, 0x07
-;   add w8, w8, w10, lsl #2
-;   .byte 0x0c, 0x0d, 0x0e, 0x0f
+;   ldr q5, #0x20
 ;   mov w1, #1
 ;   and w3, w1, #7
 ;   neg x5, x3
 ;   dup v7.16b, w5
 ;   ushl v0.16b, v5.16b, v7.16b
 ;   ret
+;   .byte 0x00, 0x00, 0x00, 0x00
+;   .byte 0x00, 0x01, 0x02, 0x03
+;   .byte 0x04, 0x05, 0x06, 0x07
+;   add w8, w8, w10, lsl #2
+;   .byte 0x0c, 0x0d, 0x0e, 0x0f
 
 function %sshr_i8x16(i32) -> i8x16 {
 block0(v0: i32):
@@ -289,7 +291,7 @@ block0(v0: i32):
 
 ; VCode:
 ; block0:
-;   ldr q6, pc+8 ; b 20 ; data.f128 0x0f0e0d0c0b0a09080706050403020100
+;   ldr q6, [const(0)]
 ;   and w3, w0, #7
 ;   sub x5, xzr, x3
 ;   dup v7.16b, w5
@@ -298,17 +300,18 @@ block0(v0: i32):
 ; 
 ; Disassembled:
 ; block0: ; offset 0x0
-;   ldr q6, #8
-;   b #0x18
-;   .byte 0x00, 0x01, 0x02, 0x03
-;   .byte 0x04, 0x05, 0x06, 0x07
-;   add w8, w8, w10, lsl #2
-;   .byte 0x0c, 0x0d, 0x0e, 0x0f
+;   ldr q6, #0x20
 ;   and w3, w0, #7
 ;   neg x5, x3
 ;   dup v7.16b, w5
 ;   sshl v0.16b, v6.16b, v7.16b
 ;   ret
+;   .byte 0x00, 0x00, 0x00, 0x00
+;   .byte 0x00, 0x00, 0x00, 0x00
+;   .byte 0x00, 0x01, 0x02, 0x03
+;   .byte 0x04, 0x05, 0x06, 0x07
+;   add w8, w8, w10, lsl #2
+;   .byte 0x0c, 0x0d, 0x0e, 0x0f
 
 function %sshr_i8x16_imm(i8x16, i32) -> i8x16 {
 block0(v0: i8x16, v1: i32):

cranelift/filetests/filetests/isa/aarch64/simd-lane-access-compile.clif

@@ -15,25 +15,26 @@ block0:
 ; VCode:
 ; block0:
 ;   movi v30.16b, #0
-;   movz x4, #1
-;   fmov s31, w4
-;   ldr q3, pc+8 ; b 20 ; data.f128 0x11000000000000000000000000000000
+;   movz w3, #1
+;   fmov s31, w3
+;   ldr q3, [const(0)]
 ;   tbl v0.16b, { v30.16b, v31.16b }, v3.16b
 ;   ret
 ; 
 ; Disassembled:
 ; block0: ; offset 0x0
 ;   movi v30.16b, #0
-;   mov x4, #1
-;   fmov s31, w4
-;   ldr q3, #0x14
-;   b #0x24
+;   mov w3, #1
+;   fmov s31, w3
+;   ldr q3, #0x20
+;   tbl v0.16b, {v30.16b, v31.16b}, v3.16b
+;   ret
+;   .byte 0x00, 0x00, 0x00, 0x00
+;   .byte 0x00, 0x00, 0x00, 0x00
 ;   .byte 0x00, 0x00, 0x00, 0x00
 ;   .byte 0x00, 0x00, 0x00, 0x00
 ;   .byte 0x00, 0x00, 0x00, 0x00
 ;   add w0, w0, #0
-;   tbl v0.16b, {v30.16b, v31.16b}, v3.16b
-;   ret
 
 function %shuffle_same_ssa_value() -> i8x16 {
 block0:
@@ -44,26 +45,27 @@ block0:
 
 ; VCode:
 ; block0:
-;   movz x3, #1
-;   fmov s31, w3
-;   ldr q2, pc+8 ; b 20 ; data.f128 0x13000000000000000000000000000000
+;   movz w2, #1
+;   fmov s31, w2
+;   ldr q2, [const(0)]
 ;   mov v30.16b, v31.16b
 ;   tbl v0.16b, { v30.16b, v31.16b }, v2.16b
 ;   ret
 ; 
 ; Disassembled:
 ; block0: ; offset 0x0
-;   mov x3, #1
-;   fmov s31, w3
-;   ldr q2, #0x10
-;   b #0x20
+;   mov w2, #1
+;   fmov s31, w2
+;   ldr q2, #0x20
+;   mov v30.16b, v31.16b
+;   tbl v0.16b, {v30.16b, v31.16b}, v2.16b
+;   ret
+;   .byte 0x00, 0x00, 0x00, 0x00
+;   .byte 0x00, 0x00, 0x00, 0x00
 ;   .byte 0x00, 0x00, 0x00, 0x00
 ;   .byte 0x00, 0x00, 0x00, 0x00
 ;   .byte 0x00, 0x00, 0x00, 0x00
 ;   sbfx w0, w0, #0, #1
-;   mov v30.16b, v31.16b
-;   tbl v0.16b, {v30.16b, v31.16b}, v2.16b
-;   ret
 
 function %swizzle() -> i8x16 {
 block0:
@@ -75,27 +77,25 @@ block0:
 
 ; VCode:
 ; block0:
-;   ldr q2, pc+8 ; b 20 ; data.f128 0x0f0e0d0c0b0a09080706050403020100
-;   ldr q3, pc+8 ; b 20 ; data.f128 0x0f0e0d0c0b0a09080706050403020100
+;   ldr q2, [const(1)]
+;   ldr q3, [const(0)]
 ;   tbl v0.16b, { v2.16b }, v3.16b
 ;   ret
 ; 
 ; Disassembled:
 ; block0: ; offset 0x0
-;   ldr q2, #8
-;   b #0x18
-;   .byte 0x00, 0x01, 0x02, 0x03
-;   .byte 0x04, 0x05, 0x06, 0x07
-;   add w8, w8, w10, lsl #2
-;   .byte 0x0c, 0x0d, 0x0e, 0x0f
-;   ldr q3, #0x20
-;   b #0x30
-;   .byte 0x00, 0x01, 0x02, 0x03
-;   .byte 0x04, 0x05, 0x06, 0x07
-;   add w8, w8, w10, lsl #2
-;   .byte 0x0c, 0x0d, 0x0e, 0x0f
+;   ldr q2, #0x20
+;   ldr q3, #0x10
 ;   tbl v0.16b, {v2.16b}, v3.16b
 ;   ret
+;   .byte 0x00, 0x01, 0x02, 0x03
+;   .byte 0x04, 0x05, 0x06, 0x07
+;   add w8, w8, w10, lsl #2
+;   .byte 0x0c, 0x0d, 0x0e, 0x0f
+;   .byte 0x00, 0x01, 0x02, 0x03
+;   .byte 0x04, 0x05, 0x06, 0x07
+;   add w8, w8, w10, lsl #2
+;   .byte 0x0c, 0x0d, 0x0e, 0x0f
 
 function %splat_i8(i8) -> i8x16 {
 block0(v0: i8):

cranelift/filetests/filetests/isa/aarch64/simd.clif

@@ -33,14 +33,14 @@ block0:
 
 ; VCode:
 ; block0:
-;   movz x1, #42679
-;   dup v0.8h, w1
+;   movz x0, #42679
+;   dup v0.8h, w0
 ;   ret
 ; 
 ; Disassembled:
 ; block0: ; offset 0x0
-;   mov x1, #0xa6b7
-;   dup v0.8h, w1
+;   mov x0, #0xa6b7
+;   dup v0.8h, w0
 ;   ret
 
 function %f4(i32, i8x16, i8x16) -> i8x16 {
@@ -156,14 +156,14 @@ block0:
 
 ; VCode:
 ; block0:
-;   movi v1.2d, #18374687579166474495
-;   fmov d0, d1
+;   movi v0.2d, #18374687579166474495
+;   fmov d0, d0
 ;   ret
 ; 
 ; Disassembled:
 ; block0: ; offset 0x0
-;   movi v1.2d, #0xff0000ffff0000ff
-;   fmov d0, d1
+;   movi v0.2d, #0xff0000ffff0000ff
+;   fmov d0, d0
 ;   ret
 
 function %f10() -> i32x4 {

cranelift/filetests/filetests/isa/aarch64/vhigh_bits.clif

@@ -10,12 +10,12 @@ block0(v0: i8x16):
 ; VCode:
 ; block0:
 ;   sshr v2.16b, v0.16b, #7
-;   movz x5, #513
-;   movk x5, x5, #2052, LSL #16
-;   movk x5, x5, #8208, LSL #32
-;   movk x5, x5, #32832, LSL #48
-;   dup v16.2d, x5
-;   and v22.16b, v2.16b, v16.16b
+;   movz x7, #513
+;   movk x7, x7, #2052, LSL #16
+;   movk x7, x7, #8208, LSL #32
+;   movk x7, x7, #32832, LSL #48
+;   dup v20.2d, x7
+;   and v22.16b, v2.16b, v20.16b
 ;   ext v24.16b, v22.16b, v22.16b, #8
 ;   zip1 v26.16b, v22.16b, v24.16b
 ;   addv h28, v26.8h
@@ -25,12 +25,12 @@ block0(v0: i8x16):
 ; Disassembled:
 ; block0: ; offset 0x0
 ;   sshr v2.16b, v0.16b, #7
-;   mov x5, #0x201
-;   movk x5, #0x804, lsl #16
-;   movk x5, #0x2010, lsl #32
-;   movk x5, #0x8040, lsl #48
-;   dup v16.2d, x5
-;   and v22.16b, v2.16b, v16.16b
+;   mov x7, #0x201
+;   movk x7, #0x804, lsl #16
+;   movk x7, #0x2010, lsl #32
+;   movk x7, #0x8040, lsl #48
+;   dup v20.2d, x7
+;   and v22.16b, v2.16b, v20.16b
 ;   ext v24.16b, v22.16b, v22.16b, #8
 ;   zip1 v26.16b, v22.16b, v24.16b
 ;   addv h28, v26.8h
@@ -46,12 +46,12 @@ block0(v0: i8x16):
 ; VCode:
 ; block0:
 ;   sshr v2.16b, v0.16b, #7
-;   movz x5, #513
-;   movk x5, x5, #2052, LSL #16
-;   movk x5, x5, #8208, LSL #32
-;   movk x5, x5, #32832, LSL #48
-;   dup v16.2d, x5
-;   and v22.16b, v2.16b, v16.16b
+;   movz x7, #513
+;   movk x7, x7, #2052, LSL #16
+;   movk x7, x7, #8208, LSL #32
+;   movk x7, x7, #32832, LSL #48
+;   dup v20.2d, x7
+;   and v22.16b, v2.16b, v20.16b
 ;   ext v24.16b, v22.16b, v22.16b, #8
 ;   zip1 v26.16b, v22.16b, v24.16b
 ;   addv h28, v26.8h
@@ -61,12 +61,12 @@ block0(v0: i8x16):
 ; Disassembled:
 ; block0: ; offset 0x0
 ;   sshr v2.16b, v0.16b, #7
-;   mov x5, #0x201
-;   movk x5, #0x804, lsl #16
-;   movk x5, #0x2010, lsl #32
-;   movk x5, #0x8040, lsl #48
-;   dup v16.2d, x5
-;   and v22.16b, v2.16b, v16.16b
+;   mov x7, #0x201
+;   movk x7, #0x804, lsl #16
+;   movk x7, #0x2010, lsl #32
+;   movk x7, #0x8040, lsl #48
+;   dup v20.2d, x7
+;   and v22.16b, v2.16b, v20.16b
 ;   ext v24.16b, v22.16b, v22.16b, #8
 ;   zip1 v26.16b, v22.16b, v24.16b
 ;   addv h28, v26.8h
@@ -82,7 +82,7 @@ block0(v0: i16x8):
 ; VCode:
 ; block0:
 ;   sshr v2.8h, v0.8h, #15
-;   ldr q4, pc+8 ; b 20 ; data.f128 0x00800040002000100008000400020001
+;   ldr q4, [const(0)]
 ;   and v6.16b, v2.16b, v4.16b
 ;   addv h16, v6.8h
 ;   umov w0, v16.h[0]
@@ -91,16 +91,17 @@ block0(v0: i16x8):
 ; Disassembled:
 ; block0: ; offset 0x0
 ;   sshr v2.8h, v0.8h, #0xf
-;   ldr q4, #0xc
-;   b #0x1c
-;   .byte 0x01, 0x00, 0x02, 0x00
-;   .byte 0x04, 0x00, 0x08, 0x00
-;   .byte 0x10, 0x00, 0x20, 0x00
-;   .byte 0x40, 0x00, 0x80, 0x00
+;   ldr q4, #0x20
 ;   and v6.16b, v2.16b, v4.16b
 ;   addv h16, v6.8h
 ;   umov w0, v16.h[0]
 ;   ret
+;   .byte 0x00, 0x00, 0x00, 0x00
+;   .byte 0x00, 0x00, 0x00, 0x00
+;   .byte 0x01, 0x00, 0x02, 0x00
+;   .byte 0x04, 0x00, 0x08, 0x00
+;   .byte 0x10, 0x00, 0x20, 0x00
+;   .byte 0x40, 0x00, 0x80, 0x00
 
 function %f4(i32x4) -> i8 {
 block0(v0: i32x4):
@@ -111,7 +112,7 @@ block0(v0: i32x4):
 ; VCode:
 ; block0:
 ;   sshr v2.4s, v0.4s, #31
-;   ldr q4, pc+8 ; b 20 ; data.f128 0x00000008000000040000000200000001
+;   ldr q4, [const(0)]
 ;   and v6.16b, v2.16b, v4.16b
 ;   addv s16, v6.4s
 ;   mov w0, v16.s[0]
@@ -120,16 +121,17 @@ block0(v0: i32x4):
 ; Disassembled:
 ; block0: ; offset 0x0
 ;   sshr v2.4s, v0.4s, #0x1f
-;   ldr q4, #0xc
-;   b #0x1c
-;   .byte 0x01, 0x00, 0x00, 0x00
-;   .byte 0x02, 0x00, 0x00, 0x00
-;   .byte 0x04, 0x00, 0x00, 0x00
-;   .byte 0x08, 0x00, 0x00, 0x00
+;   ldr q4, #0x20
 ;   and v6.16b, v2.16b, v4.16b
 ;   addv s16, v6.4s
 ;   mov w0, v16.s[0]
 ;   ret
+;   .byte 0x00, 0x00, 0x00, 0x00
+;   .byte 0x00, 0x00, 0x00, 0x00
+;   .byte 0x01, 0x00, 0x00, 0x00
+;   .byte 0x02, 0x00, 0x00, 0x00
+;   .byte 0x04, 0x00, 0x00, 0x00
+;   .byte 0x08, 0x00, 0x00, 0x00
 
 function %f5(i64x2) -> i8 {
 block0(v0: i64x2):