03b5dbb3e0
* aarch64: Translate float and splat lowering to ISLE
I was looking into `constant_f128` and its fallback lowering into memory
and to get familiar with the code I figured it'd be good to port some
Rust logic to ISLE. This commit ports the `constant_{f128,f64,f32}`
helpers into ISLE from Rust as well as the `splat_const` helper which
ended up being closely related.
Tests reflect a number of regalloc changes that happened but also namely
one major difference is that in the lowering of `f32` a 32-bit immediate
is created now instead of a 64-bit immediate (in a GP register before
it's moved into a FP register). This semantically has no change but the
generated code is slightly different in a few minor cases.
* aarch64: Load f64/v128 constants from a pool
This commit removes the `LoadFpuConst64` and `LoadFpuConst128`
pseudo-instructions from the AArch64 backend which internally loaded a
nearby constant and then jumped over it. Constants now go through the
`VCodeConstant` infrastructure which gets placed at the end of the
function similar to how x64 works. Some minor support was added in as
well to add a new addressing mode for a `MachLabel`-relative load.
451 lines
5.7 KiB
Plaintext
451 lines
5.7 KiB
Plaintext
test compile precise-output
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set unwind_info=false
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target aarch64
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function %f() -> i8 {
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block0:
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v0 = iconst.i8 -1
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return v0
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}
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; VCode:
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; block0:
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; movz w0, #255
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; mov w0, #0xff
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; ret
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function %f() -> i16 {
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block0:
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v0 = iconst.i16 0
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return v0
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}
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; VCode:
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; block0:
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; movz w0, #0
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; mov w0, #0
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; ret
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function %f() -> i64 {
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block0:
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v0 = iconst.i64 0
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return v0
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}
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; VCode:
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; block0:
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; movz x0, #0
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; mov x0, #0
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; ret
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function %f() -> i64 {
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block0:
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v0 = iconst.i64 0xffff
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return v0
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}
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; VCode:
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; block0:
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; movz x0, #65535
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; mov x0, #0xffff
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; ret
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function %f() -> i64 {
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block0:
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v0 = iconst.i64 0xffff0000
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return v0
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}
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; VCode:
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; block0:
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; movz x0, #65535, LSL #16
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; mov x0, #0xffff0000
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; ret
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function %f() -> i64 {
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block0:
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v0 = iconst.i64 0xffff00000000
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return v0
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}
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; VCode:
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; block0:
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; movz x0, #65535, LSL #32
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; mov x0, #0xffff00000000
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; ret
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function %f() -> i64 {
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block0:
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v0 = iconst.i64 0xffff000000000000
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return v0
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}
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; VCode:
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; block0:
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; movz x0, #65535, LSL #48
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; mov x0, #-0x1000000000000
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; ret
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function %f() -> i64 {
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block0:
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v0 = iconst.i64 0xffffffffffffffff
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return v0
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}
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; VCode:
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; block0:
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; movn x0, #0
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; mov x0, #-1
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; ret
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function %f() -> i64 {
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block0:
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v0 = iconst.i64 0xffffffffffff0000
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return v0
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}
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; VCode:
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; block0:
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; movn x0, #65535
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; mov x0, #-0x10000
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; ret
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function %f() -> i64 {
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block0:
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v0 = iconst.i64 0xffffffff0000ffff
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return v0
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}
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; VCode:
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; block0:
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; movn x0, #65535, LSL #16
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; mov x0, #-0xffff0001
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; ret
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function %f() -> i64 {
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block0:
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v0 = iconst.i64 0xffff0000ffffffff
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return v0
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}
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; VCode:
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; block0:
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; movn x0, #65535, LSL #32
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; mov x0, #-0xffff00000001
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; ret
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function %f() -> i64 {
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block0:
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v0 = iconst.i64 0x0000ffffffffffff
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return v0
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}
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; VCode:
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; block0:
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; movn x0, #65535, LSL #48
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; mov x0, #0xffffffffffff
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; ret
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function %f() -> i64 {
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block0:
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v0 = iconst.i64 0xf34bf0a31212003a ;; random digits
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return v0
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}
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; VCode:
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; block0:
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; movz x0, #58
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; movk x0, x0, #4626, LSL #16
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; movk x0, x0, #61603, LSL #32
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; movk x0, x0, #62283, LSL #48
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; mov x0, #0x3a
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; movk x0, #0x1212, lsl #16
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; movk x0, #0xf0a3, lsl #32
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; movk x0, #0xf34b, lsl #48
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; ret
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function %f() -> i64 {
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block0:
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v0 = iconst.i64 0x12e900001ef40000 ;; random digits with 2 clear half words
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return v0
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}
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; VCode:
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; block0:
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; movz x0, #7924, LSL #16
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; movk x0, x0, #4841, LSL #48
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; mov x0, #0x1ef40000
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; movk x0, #0x12e9, lsl #48
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; ret
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function %f() -> i64 {
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block0:
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v0 = iconst.i64 0x12e9ffff1ef4ffff ;; random digits with 2 full half words
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return v0
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}
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; VCode:
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; block0:
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; movn x0, #57611, LSL #16
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; movk x0, x0, #4841, LSL #48
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; mov x0, #-0xe10b0001
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; movk x0, #0x12e9, lsl #48
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; ret
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function %f() -> i32 {
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block0:
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v0 = iconst.i32 -1
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return v0
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}
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; VCode:
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; block0:
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; movn w0, #0
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; mov w0, #-1
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; ret
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function %f() -> i32 {
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block0:
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v0 = iconst.i32 0xfffffff7
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return v0
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}
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; VCode:
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; block0:
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; movn w0, #8
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; mov w0, #-9
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; ret
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function %f() -> i64 {
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block0:
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v0 = iconst.i64 0xfffffff7
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return v0
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}
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; VCode:
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; block0:
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; movn w0, #8
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; mov w0, #-9
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; ret
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function %f() -> i64 {
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block0:
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v0 = iconst.i64 0xfffffffffffffff7
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return v0
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}
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; VCode:
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; block0:
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; movn x0, #8
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; mov x0, #-9
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; ret
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function %f() -> f64 {
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block0:
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v0 = f64const 0x1.0
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return v0
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}
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; VCode:
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; block0:
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; fmov d0, #1
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; fmov d0, #1.00000000
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; ret
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function %f() -> f32 {
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block0:
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v0 = f32const 0x5.0
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return v0
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}
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; VCode:
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; block0:
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; fmov s0, #5
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; fmov s0, #5.00000000
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; ret
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function %f() -> f64 {
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block0:
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v0 = f64const 0x32.0
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return v0
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}
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; VCode:
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; block0:
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; movz x0, #16457, LSL #48
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; fmov d0, x0
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; mov x0, #0x4049000000000000
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; fmov d0, x0
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; ret
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function %f() -> f32 {
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block0:
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v0 = f32const 0x32.0
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return v0
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}
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; VCode:
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; block0:
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; movz w0, #16968, LSL #16
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; fmov s0, w0
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; mov w0, #0x42480000
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; fmov s0, w0
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; ret
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function %f() -> f64 {
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block0:
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v0 = f64const 0x0.0
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return v0
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}
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; VCode:
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; block0:
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; movi v0.2s, #0
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; movi v0.2s, #0
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; ret
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function %f() -> f32 {
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block0:
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v0 = f32const 0x0.0
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return v0
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}
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; VCode:
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; block0:
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; movi v0.2s, #0
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; movi v0.2s, #0
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; ret
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function %f() -> f64 {
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block0:
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v0 = f64const -0x10.0
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return v0
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}
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; VCode:
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; block0:
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; fmov d0, #-16
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; fmov d0, #-16.00000000
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; ret
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function %f() -> f32 {
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block0:
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v0 = f32const -0x10.0
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return v0
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}
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; VCode:
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; block0:
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; fmov s0, #-16
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; fmov s0, #-16.00000000
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; ret
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