decode: Change encoding of T16 index
This encoding change saves a shift for the "is register" part.
This commit is contained in:
8
decode.c
8
decode.c
@@ -179,8 +179,8 @@ fd_decode(const uint8_t* buffer, size_t len_sz, int mode_int, uintptr_t address,
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if (table_entry & 1) {
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if (UNLIKELY(off >= len))
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return FD_ERR_PARTIAL;
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unsigned isreg = buffer[off] >= 0xc0 ? 8 : 0;
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table_entry = table_walk(table_entry, ((buffer[off] >> 3) & 7) | isreg);
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unsigned isreg = buffer[off] >= 0xc0;
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table_entry = table_walk(table_entry, ((buffer[off] >> 2) & 0xe) | isreg);
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// table_entry kinds: INSTR(0), T8E(1)
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if (table_entry & 1)
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table_entry = table_walk(table_entry, buffer[off] & 7);
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@@ -314,8 +314,8 @@ fd_decode(const uint8_t* buffer, size_t len_sz, int mode_int, uintptr_t address,
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if (table_entry & 1) {
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if (UNLIKELY(off >= len))
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return FD_ERR_PARTIAL;
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unsigned isreg = buffer[off] >= 0xc0 ? 8 : 0;
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table_entry = table_walk(table_entry, ((buffer[off] >> 3) & 7) | isreg);
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unsigned isreg = buffer[off] >= 0xc0;
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table_entry = table_walk(table_entry, ((buffer[off] >> 2) & 0xe) | isreg);
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// table_entry kinds: INSTR(0), T8E(1), TVEX(2)
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if (table_entry & 1)
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table_entry = table_walk(table_entry, buffer[off] & 7);
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@@ -521,14 +521,14 @@ class Trie:
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elif opc.prefix:
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tprefix = [["NP", "66", "F3", "F2"].index(opc.prefix)]
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if opc.opcext:
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t16 = [((opc.opcext - 0xc0) >> 3) | 8]
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t16 = [((opc.opcext - 0xc0) >> 2) | 1]
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if not opc.extended:
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t8e = [opc.opcext & 7]
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elif opc.modreg:
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# TODO: optimize for /r and /m specifiers to reduce size
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mod = {"m": [0], "r": [1<<3], "rm": [0, 1<<3]}[opc.modreg[1]]
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mod = {"m": [0], "r": [1], "rm": [0, 1]}[opc.modreg[1]]
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reg = [opc.modreg[0]] if opc.modreg[0] is not None else list(range(8))
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t16 = [x + y for x in mod for y in reg]
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t16 = [x + (y << 1) for x in mod for y in reg]
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if opc.rexw is not None or (opc.vexl or "IG") != "IG":
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rexw = {"0": [0], "1": [1<<0], None: [0, 1<<0]}[opc.rexw]
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if opc.vex < 2:
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