Handle conflicting Before and After fixed-reg constraints with a copy. (#54)

* Extend fuzzer to generate cases like #53.

Currently, the fuzz testcase generator will add at most one
fixed-register constraint to an instruction per physical register. This
avoids impossible situations, such as specifying that both `v0` and `v1`
must be placed into the same `p0`.

However, it *should* be possible to say that `v0` is in `p0` before the
instruction, and `v1` is in `p0` after the instruction (i.e., at `Early`
and `Late` operand positions).

This in fact exposes a limitation in the current allocator design: when
`v0` is live downward, with the above constraints, it will result in an
impossible allocation situation because we cannot split in the middle of
an instruction. A subsequent fix will rectify this by using the
multi-fixed-reg fixup mechanism.

* Handle conflicting Before and After fixed-reg constraints with a copy.

This fixes #53. Previously, if two operands on an instruction
specified *different* vregs constrained to the same physical register
at the Before (Early) and After (Late) points of the instruction, and
the Before was live downward as well, we would panic: we can't insert
a move into the middle of an instruction, so putting the first vreg in
the preg at Early implies we have an unsolveable conflict at Late.

We can solve this issue by adding some new logic to insert a copy, and
rewrite the constraint. This reuses the multi-fixed-reg-constraint
fixup logic. While that logic handles the case where the *same* vreg
has multiple *different* fixed-reg constraints, this new logic
handles *different* vregs with the *same* fixed-reg constraints, but
at different *program points*; so the two are complementary.

This addresses the specific test case in #53, and also fuzzes cleanly
with the change to the fuzz testcase generator to generate these
cases (which also immediately found the bug).

* Add a reservation to the PReg when rewriting constraint so it is not doubly-allocated.

* Distinguish initial fixup moves from secondary moves.

* Use `trace` macro, not `log::trace`, to avoid trace output when feature is disabled.

* Rework operand rewriting to properly handle bundle-merging edge case.

When the liverange for the defined vreg with fixed constraint at Late is
*merged* with the liverange for the used vreg with fixed constraint at
Early, the strategy of putting a fixed reservation on the preg at Early
fails, because the whole bundle is minimal (if it spans just the
instruction's Early and Late and nothing else). This could happen if
e.g. the def flows into a blockparam arg that merges with a blockparam
defining the used value.

Instead we move the def one halfstep earlier, to the Early point, with
its fixed-reg constraint still in place. This has the same effect but
works when the two are merged.

* Fix checker issue: make more flexible in the presence of victim-register saves.

src/fuzzing/func.rs

@@ -483,16 +483,37 @@ impl Func {
                         OperandPos::Early,
                     );
                 } else if opts.fixed_regs && bool::arbitrary(u)? {
-                    let mut fixed = vec![];
+                    let mut fixed_early = vec![];
+                    let mut fixed_late = vec![];
                     for _ in 0..u.int_in_range(0..=operands.len() - 1)? {
                         // Pick an operand and make it a fixed reg.
-                        let fixed_reg = PReg::new(u.int_in_range(0..=62)?, RegClass::Int);
-                        if fixed.contains(&fixed_reg) {
-                            break;
-                        }
-                        fixed.push(fixed_reg);
                         let i = u.int_in_range(0..=(operands.len() - 1))?;
                         let op = operands[i];
+                        let fixed_reg = PReg::new(u.int_in_range(0..=62)?, RegClass::Int);
+                        let fixed_list = match op.pos() {
+                            OperandPos::Early => &mut fixed_early,
+                            OperandPos::Late => &mut fixed_late,
+                        };
+                        if fixed_list.contains(&fixed_reg) {
+                            break;
+                        }
+                        if op.kind() != OperandKind::Def && op.pos() == OperandPos::Late {
+                            // Late-uses/mods with fixed constraints
+                            // can't be allowed if we're allowing
+                            // different constraints at Early and
+                            // Late, because we can't move something
+                            // into a location between Early and
+                            // Late. Differing constraints only make
+                            // sense if the instruction itself
+                            // produces the newly-constrained values.
+                            break;
+                        }
+                        if op.kind() != OperandKind::Use && op.pos() == OperandPos::Early {
+                            // Likewise, we can *only* allow uses for
+                            // fixed constraints at Early.
+                            break;
+                        }
+                        fixed_list.push(fixed_reg);
                         operands[i] = Operand::new(
                             op.vreg(),
                             OperandConstraint::FixedReg(fixed_reg),