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318fdc50eb296d8c7eafee3fd57f4b6bc8d7f6ef
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75 Commits

Author SHA1 Message Date
Alexis Engelke
318fdc50eb decode: Replace table walk macro with function 2020-11-17 10:43:08 +01:00
Alexis Engelke
58464d6fa1 decode: Fix ignoring VEX.B in 32-bit mode 2020-11-09 09:47:36 +01:00
Alexis Engelke
62b0420147 parseinstr: Simplify opcode naming scheme 2020-11-09 09:47:36 +01:00
Alexis Engelke
9df6ac1788 decode: Replace T8+T72 with T16+T8E for R/M value 2020-11-09 09:47:36 +01:00
Alexis Engelke
01e1587c5c decode: Move prefix before other opcode extensions 2020-11-09 09:47:36 +01:00
Alexis Engelke
2e7e396325 decode: Remove TABLE_PREFIX_REP and use NFx prefix 2020-11-09 09:47:36 +01:00
Alexis Engelke
9b6caeb2ae parseinstrs: Write mnemonics to separate file 2020-07-04 14:35:51 +02:00
Alexis Engelke
c9333ac2c9 instrs: Enforce memory for VSIB encodings 2020-07-04 14:24:59 +02:00
Alexis Engelke
7ee9320840 decode: Add second fixed operand size 2020-06-30 22:07:18 +02:00
Alexis Engelke
1b5461036e decode: Don't walk escape opcodes in tables 2020-06-27 17:33:58 +02:00
Alexis Engelke
3ad518e22e decode: Store op types early and compact encoding 
* The encoding of operand types in the decode table now only requires 9
  bits instead of the previous 16 bits.
* Operand types are decoded before the operands itself are stored. This
  allows to ignore REX.RB prefixed for specific register types.
 2020-06-27 17:33:58 +02:00
Alexis Engelke
5e1bb1871f decode: Check CR/DR/SEG reg count in ModRM decoder 2020-06-27 17:33:58 +02:00
Alexis Engelke
bacfecfead fadec: Allow 64-bit decoding on 32-bit platforms 2020-06-27 17:33:58 +02:00
Alexis Engelke
55197817a7 decode: Remove several unneeded #ifdef's 
In many cases, the compiler is able to figure out itself whether support
for one decoding mode is disabled.
 2020-06-25 21:04:10 +02:00
Alexis Engelke
348d1aec4b decode: Minor refactoring for better performance 
This improves decoding performance by ~4%.
 2020-06-25 21:04:10 +02:00
Alexis Engelke
807d8a817b decode: Change imm_control to get rid of imm_byte 2020-06-19 14:04:17 +02:00
Alexis Engelke
ab5e0c67c1 decode: Don't fall back to memory encoding with 72-table 2020-06-19 14:04:17 +02:00
Alexis Engelke
f4b41a7e80 decode: Use uint16_t for trie 2020-06-17 16:44:22 +02:00
Alexis Engelke
545ec30ad0 decode: Return partial error on incomplete opcode 2020-06-14 14:01:39 +02:00
Alexis Engelke
80ec7ed960 instrs: Fix decoding of XCHG r8, rax 
Opcode 90 is only a NOP if there is no REX.B.
 2020-06-14 13:36:11 +02:00
Alexis Engelke
c3df15e19b api: Store index register in operand struct 
Combined with some reordering of the struct fields, this reduces the
size of an FdInstr from 56 bytes to 48 bytes.
 2020-06-14 13:36:01 +02:00
Alexis Engelke
7a364fcada api: Drop unused internal FD_FLAG_REX 2020-05-17 11:14:52 +02:00
Alexis Engelke
afc574503f Decode jump targets as offset if address is NULL 
Addresses relative to the actual address of the instruction are decoded
as new offset operand, where the RIP has to be added to obtain the real
value. For backwards compatibility, the new behavior is only exposed if
the address of the instruction is specified as zero.
 2020-03-07 14:30:07 +01:00
Alexis Engelke
dc286b14f2 Unify instruction mnemonics [API break] 
It is a longer standing issue that some instructions like ADD, IMUL, and
SHL have multiple mnemonics for different encoding forms. This is a
relict from a time where such information was not stored in the
instruction decoding. This, however, is no longer the case and therefore
the extra mnemonics just increase the number of cases to be handled by
users.
 2020-02-20 10:56:17 +01:00
Alexis Engelke
513a913feb decode: Store CL as register operand for shifts 2020-02-19 16:53:59 +01:00
Alexis Engelke
8572c15973 Handle RVMR encodings correctly in 32-bit mode 
The most significant bit in the immediate is ingored in 32-bit mode.
 2020-02-10 20:34:37 +01:00
Alexis Engelke
f6a66ea4fb Use special root table for VEX 
Some instruction opcodes have an entirely different encoding when a VEX
prefix is present. For example, 0f41 is CMOVNO without mandatory
prefixes while VEX.NP.W0.L1.0f41 is KANDW with a mandatory prefix. To
avoid collisions, the VEX prefix is better handled as a completely
separate decode tree, at the cost of a slight increase in table size.
 2020-02-10 20:34:37 +01:00
Alexis Engelke
e73dbb3eea Be more restrictive with VSIB encodings 2020-02-10 20:34:37 +01:00
Alexis Engelke
19b76c809e Add MMX and several other instructions 2019-11-03 11:56:24 +01:00
Alexis Engelke
2bf33017bc Reject invalid move to CS 2019-11-03 11:54:00 +01:00
Alexis Engelke
dbfcf33c33 Add more precise error codes 2019-11-02 22:31:10 +01:00
Alexis Engelke
21c40c48d0 Fix compilation error 2019-11-02 22:18:27 +01:00
Alexis Engelke
dbf72dd282 Fix VEX+REX handling 2019-11-02 22:16:50 +01:00
Alexis Engelke
a5a15258fd Fix another bug with REX prefix decoding 2019-11-02 21:54:39 +01:00
Alexis Engelke
92e104d411 Finally fix moves from/to CR/DR registers 2019-11-02 21:48:36 +01:00
Alexis Engelke
96ba1a1166 Verify more register indices 2019-11-02 21:47:28 +01:00
Alexis Engelke
ab2d60da75 Reject invalid segment registers 2019-11-02 21:11:35 +01:00
Alexis Engelke
e2026b572d Reject invalid VEX encodings 2019-11-02 21:08:34 +01:00
Alexis Engelke
bd6c7ceebe Begin enforcing memory operand requirements 2019-11-02 19:21:29 +01:00
Alexis Engelke
194a7d6831 Add REP-prefix table 2019-11-02 19:01:23 +01:00
Alexis Engelke
e43ec050af Correctly handle mis-placed REX prefix 2019-11-02 17:32:40 +01:00
Alexis Engelke
a2a28b7342 Fix immediate size for REX+66 combinations 2019-11-02 17:08:58 +01:00
Alexis Engelke
915c2296c1 Add support for far returns 2019-11-02 17:08:37 +01:00
Alexis Engelke
c4a4df458d Be more restrictive about VEX prefix combinations 2019-11-02 15:53:00 +01:00
Alexis Engelke
5613adda25 Support decoding SS segment override prefix 2019-11-02 15:52:45 +01:00
Alexis Engelke
bb3c7a4a4f Fix alignment warnings from Clang 2019-08-18 18:13:39 +02:00
Alexis Engelke
c59319b3bb Rename decode tables to fadec-decode-table.inc 2019-06-16 09:45:51 +02:00
Alexis Engelke
3f278bc6cc Store register type in decoded instruction 2019-05-05 12:53:10 +02:00
Alexis Engelke
dff78c5a86 Support VSIB encoding 2019-04-27 11:16:09 +02:00
Alexis Engelke
a7d4c7be9d Minor clean-up 2019-04-27 11:09:57 +02:00