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decode: Fix ignoring VEX.B in 32-bit mode

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This commit is contained in:
Alexis Engelke
2020-11-09 09:43:21 +01:00
parent 62b0420147
commit 58464d6fa1
2 changed files with 3 additions and 1 deletions
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2
decode.c
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@@ -139,7 +139,7 @@ decode_prefixes(const uint8_t* buffer, int len, DecodeMode mode,
{
prefixes |= byte & 0x40 ? 0 : PREFIX_REXX;
// SDM Vol 2A 2-15 (Dec. 2016): Ignored in 32-bit mode
prefixes |= mode == DECODE_64 || (byte & 0x20) ? 0 : PREFIX_REXB;
prefixes |= mode != DECODE_64 || (byte & 0x20) ? 0 : PREFIX_REXB;
*out_opcode_escape = (byte & 0x1f);
// Load third byte of VEX prefix

2
tests/test_decode.c
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@@ -248,6 +248,8 @@ main(int argc, char** argv)
TEST("\xf3\x0f\x7e\x5c\x24\x08", "[SSE_MOVQ reg16:r3 mem8:r4+0x8]");
TEST32("\xc4\xe1\x00\x58\xc1", "[VADDPS reg16:r0 reg16:r7 reg16:r1]"); // MSB in vvvv ignored
TEST64("\xc4\xe1\x00\x58\xc1", "[VADDPS reg16:r0 reg16:r15 reg16:r1]");
TEST32("\xc4\xc1\x78\x58\xc0", "[VADDPS reg16:r0 reg16:r0 reg16:r0]"); // VEX.B ignored in 32-bit
TEST64("\xc4\xc1\x78\x58\xc0", "[VADDPS reg16:r0 reg16:r0 reg16:r8]");
TEST("\xc5\xf9\x6e\xc8", "[VMOVD reg4:r1 reg4:r0]");
TEST64("\xc4\xe1\xf9\x6e\xc8", "[VMOVQ reg8:r1 reg8:r0]");
TEST32("\xc4\xe1\xf9\x6e\xc8", "[VMOVD reg4:r1 reg4:r0]");