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Distinguish VZEROALL and VZEROUPPER

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Alexis Engelke
2019-02-24 15:45:37 +01:00
parent f7f0b322c7
commit d5d0009070
2 changed files with 2 additions and 2 deletions
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1
README.md
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@@ -5,7 +5,6 @@ A fast and lightweight decoder for x86 and x86-64. *This is not a disassembler,
### Known issues
- An implicit `FWAIT` in FPU instructions is decoded as a separate instruction. For example, the instruction `FINIT` is decoded as an `FWAIT` followed by an `FINIT` where as `FNINIT` is decoded as a plain `FINIT` instruction.
- The AVX VSIB encoding is not supported yet, all instructions using this will result in a decode error.
- A mandatory L0 or L1 in the VEX prefix is currently ignored to reduce the size of the prefix tables. The only instructions where this has an effect are `VZEROALL` (L1) and `VZEROUPPER` (L0) and are currently decoded as `VZERO`, the vector length prefix can be used to determine the actual instruction.
- The EVEX prefix (AVX-512) is not supported (yet).
- No ABI stability as the value associated with the mnemonics will change if further instructions are added. When using this library, please link it statically.
- The instruction formatter does not include prefixes. (Help needed.)

3
instrs.txt
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@@ -818,7 +818,8 @@ VEX.66.0f73/7 VMI XMM XMM IMM8 - VPSLLDQ IMM_8
VEX.66.0f74 RVM XMM XMM XMM - VPCMPEQB
VEX.66.0f75 RVM XMM XMM XMM - VPCMPEQW
VEX.66.0f76 RVM XMM XMM XMM - VPCMPEQD
VEX.NP.0f77 NP - - - - VZERO
VEX.NP.L0.0f77 NP - - - - VZEROUPPER
VEX.NP.L1.0f77 NP - - - - VZEROALL
VEX.66.0f7c RVM XMM XMM XMM - VHADDPD
VEX.F2.0f7c RVM XMM XMM XMM - VHADDPS
VEX.66.0f7d RVM XMM XMM XMM - VHSUBPD