From d5d00090703f1030c6ff683f3e6c2efb35f006a2 Mon Sep 17 00:00:00 2001 From: Alexis Engelke Date: Sun, 24 Feb 2019 15:45:37 +0100 Subject: [PATCH] Distinguish VZEROALL and VZEROUPPER --- README.md | 1 - instrs.txt | 3 ++- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/README.md b/README.md index 8d61cf5..c98e848 100644 --- a/README.md +++ b/README.md @@ -5,7 +5,6 @@ A fast and lightweight decoder for x86 and x86-64. *This is not a disassembler, ### Known issues - An implicit `FWAIT` in FPU instructions is decoded as a separate instruction. For example, the instruction `FINIT` is decoded as an `FWAIT` followed by an `FINIT` where as `FNINIT` is decoded as a plain `FINIT` instruction. - The AVX VSIB encoding is not supported yet, all instructions using this will result in a decode error. -- A mandatory L0 or L1 in the VEX prefix is currently ignored to reduce the size of the prefix tables. The only instructions where this has an effect are `VZEROALL` (L1) and `VZEROUPPER` (L0) and are currently decoded as `VZERO`, the vector length prefix can be used to determine the actual instruction. - The EVEX prefix (AVX-512) is not supported (yet). - No ABI stability as the value associated with the mnemonics will change if further instructions are added. When using this library, please link it statically. - The instruction formatter does not include prefixes. (Help needed.) diff --git a/instrs.txt b/instrs.txt index 900f485..b558517 100644 --- a/instrs.txt +++ b/instrs.txt @@ -818,7 +818,8 @@ VEX.66.0f73/7 VMI XMM XMM IMM8 - VPSLLDQ IMM_8 VEX.66.0f74 RVM XMM XMM XMM - VPCMPEQB VEX.66.0f75 RVM XMM XMM XMM - VPCMPEQW VEX.66.0f76 RVM XMM XMM XMM - VPCMPEQD -VEX.NP.0f77 NP - - - - VZERO +VEX.NP.L0.0f77 NP - - - - VZEROUPPER +VEX.NP.L1.0f77 NP - - - - VZEROALL VEX.66.0f7c RVM XMM XMM XMM - VHADDPD VEX.F2.0f7c RVM XMM XMM XMM - VHADDPS VEX.66.0f7d RVM XMM XMM XMM - VHSUBPD