Add a RISC-V 64 (`riscv64`, RV64GC) backend. Co-authored-by: yuyang <756445638@qq.com> Co-authored-by: Chris Fallin <chris@cfallin.org> Co-authored-by: Afonso Bordado <afonsobordado@az8.co>
20 lines
564 B
Plaintext
20 lines
564 B
Plaintext
test interpret
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test run
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target aarch64
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target s390x
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target x86_64
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target riscv64
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function %iconcat_isplit(i64, i64) -> i64, i64 {
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block0(v0: i64, v1: i64):
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v2 = iconcat v0, v1
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v3, v4 = isplit v2
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return v3, v4
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}
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; run: %iconcat_isplit(0, 0) == [0, 0]
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; run: %iconcat_isplit(1, 1) == [1, 1]
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; run: %iconcat_isplit(0xFFFFFFFF_FFFFFFFF, 0) == [0xFFFFFFFF_FFFFFFFF, 0]
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; run: %iconcat_isplit(0, 0xFFFFFFFF_FFFFFFFF) == [0, 0xFFFFFFFF_FFFFFFFF]
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; run: %iconcat_isplit(0x01010101_01010101, 0x02020202_02020202) == [0x01010101_01010101, 0x02020202_02020202]
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