Add a RISC-V 64 (`riscv64`, RV64GC) backend. Co-authored-by: yuyang <756445638@qq.com> Co-authored-by: Chris Fallin <chris@cfallin.org> Co-authored-by: Afonso Bordado <afonsobordado@az8.co>
32 lines
473 B
Plaintext
32 lines
473 B
Plaintext
test interpret
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test run
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target aarch64
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target s390x
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target x86_64
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target riscv64
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function %alias(i8) -> i8 {
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block0(v0: i8):
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v1 -> v0
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return v1
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}
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; run: %alias(0) == 0
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; run: %alias(-1) == -1
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function %double_alias(i8) -> i8 {
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block0(v0: i8):
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v1 -> v0
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v2 -> v1
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return v2
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}
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; run: %double_alias(0) == 0
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; run: %double_alias(-1) == -1
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function %alias_inst() -> i8 {
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block0:
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v0 = iconst.i8 10
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v1 -> v0
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return v1
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}
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; run: %alias_inst() == 10
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