Modify return pseudo-instructions to have pairs of registers: virtual and real. This allows us to constrain the virtual registers to the real ones specified by the abi, instead of directly emitting moves to those real registers.
46 lines
763 B
Plaintext
46 lines
763 B
Plaintext
test compile precise-output
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set enable_simd
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target aarch64
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function %icmp_ne_32x4(i32x4, i32x4) -> i32x4 {
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block0(v0: i32x4, v1: i32x4):
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v2 = icmp ne v0, v1
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return v2
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}
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; block0:
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; cmeq v3.4s, v0.4s, v1.4s
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; mvn v0.16b, v3.16b
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; ret
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function %icmp_ugt_i32x4(i32x4, i32x4) -> i32x4 {
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block0(v0: i32x4, v1: i32x4):
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v2 = icmp ugt v0, v1
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return v2
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}
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; block0:
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; cmhi v0.4s, v0.4s, v1.4s
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; ret
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function %icmp_sge_i16x8(i16x8, i16x8) -> i16x8 {
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block0(v0: i16x8, v1: i16x8):
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v2 = icmp sge v0, v1
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return v2
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}
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; block0:
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; cmge v0.8h, v0.8h, v1.8h
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; ret
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function %icmp_uge_i8x16(i8x16, i8x16) -> i8x16 {
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block0(v0: i8x16, v1: i8x16):
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v2 = icmp uge v0, v1
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return v2
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}
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; block0:
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; cmhs v0.16b, v0.16b, v1.16b
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; ret
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